ATmega16 datasheet(118/357 Pages) ATMEL

118 / 357 page

118

2466S–AVR–05/09

ATmega16(L)

The double buffered Output Compare Register (OCR2) is compared with the Timer/Counter

value at all times. The result of the compare can be used by the waveform generator to generate

a PWM or variable frequency output on the Output Compare Pin (OC2). See “Output Compare

Unit” on page 119. for details. The compare match event will also set the Compare Flag (OCF2)

which can be used to generate an output compare interrupt request.

Definitions

Many register and bit references in this document are written in general form. A lower case “n”

replaces the Timer/Counter number, in this case 2. However, when using the register or bit

defines in a program, the precise form must be used (i.e., TCNT2 for accessing Timer/Counter2

counter value and so on). The definitions in Table 49 are also used extensively throughout the

document.

Timer/Counter

Clock Sources

The Timer/Counter can be clocked by an internal synchronous or an external asynchronous

clock source. The clock source clk

T2 is by default equal to the MCU clock, clkI/O. When the AS2

bit in the ASSR Register is written to logic one, the clock source is taken from the Timer/Counter

Oscillator connected to TOSC1 and TOSC2. For details on asynchronous operation, see “Asyn-

chronous Status Register – ASSR” on page 131. For details on clock sources and prescaler, see

“Timer/Counter Prescaler” on page 134.

Counter Unit

The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure

54 shows a block diagram of the counter and its surrounding environment.

Figure 54. Counter Unit Block Diagram

Signal description (internal signals):

count

Increment or decrement TCNT2 by 1.

direction

Selects between increment and decrement.

clear

Clear TCNT2 (set all bits to zero).

clk

Timer/Counter clock.

top

Signalizes that TCNT2 has reached maximum value.

Table 49. Definitions

BOTTOM

The counter reaches the BOTTOM when it becomes zero (0x00).

MAX

The counter reaches its MAXimum when it becomes 0xFF (decimal

255).

TOP

The counter reaches the TOP when it becomes equal to the highest

value in the count sequence. The TOP value can be assigned to be the

fixed value 0xFF (MAX) or the value stored in the OCR2 Register. The

assignment is dependent on the mode of operation.

DATA BUS

TCNTn

Control Logic

count

TOVn

(Int.Req.)

top

bottom

direction

clear

TOSC1

T/C

Oscillator

TOSC2

Prescaler

clk

I/O

clk

ATmega16 датащи(PDF) 118 Page - ATMEL Corporation

ATmega16 датащи(HTML) 118 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL