ICS8524AYLF datasheet(11/17 Pages) IDT

11 / 17 page

8524AY

www.icst.com/products/hiperclocks.html

REV. B AUGUST 1, 2007

ICS8524

LOW SKEW, 1-TO-22

DIFFERENTIAL-TO-HSTL FANOUT BUFFER

VDDO=1.8V

0.1uF

(U1-48)

(U1-64)

R12

Zo = 50

0.1uF

(U1-32)

0.1uF

(U1-33)

0.1uF

Zo = 50

0.1uF

(U1-1)

0.1uF

(U1-49)

VDD=3.3V

R10

Zo = 50

LVHSTL Driv er

(U1-17)

Zo = 50

0.1uF

1.8V

VDDO=1.8V

VDD=3.3V

Zo = 50 Ohm

(U1-16)

ICS8524

VDDO

VDD

CLK

nCLK

CLK_SEL

PCLK

nPCLK

GND

nQ21

Q21

VDDO

Q11

nQ11

Q12

nQ12

Q13

nQ13

VDDO

nQ7

nQ8

nQ9

Q10

nQ10

0.1u

R11

Zo = 50 Ohm

SCHEMATIC EXAMPLE

Figure 5 shows a schematic example of the ICS8524. In this

example, the input is driven by an ICS HiPerClockS HSTL driver.

The decoupling capacitors should be physically located near the

FIGURE 5. ICS8524 HSTL BUFFER SCHEMATIC EXAMPLE

power pin. For ICS8524, the unused clock outputs can be left

floating.

EXPOSED PAD

Expose Metal Pad

(GROUND PAD)

GROUND PLANE

SOLDER

SIGNAL

TRACE

SIGNAL

TRACE

THERM AL VIA

SOLDER M ASK

FIGURE 6. P.C. BOARD FOR EXPOSED PAD THERMAL RELEASE PATH EXAMPLE

THERMAL RELEASE PATH

The expose metal pad provides heat transfer from the device to

the P.C. board. The expose metal pad is ground pad connected

to ground plane through thermal via. The exposed pad on the

device to the exposed metal pad on the PCB is contacted through

solder as shown in

Figure 6. For further information, please re-

fer to the Application Note on Surface Mount Assembly of

Amkor’s Thermally /Electrically Enhance Leadframe Base Pack-

age, Amkor Technology.

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