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ICS1893CF датащи(PDF) 23 Page - Integrated Device Technology |
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ICS1893CF датащи(HTML) 23 Page - Integrated Device Technology |
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23 / 127 page ![]() Chapter 5 Interface Overviews ICS1893CF, Rev. J, 08/11/09 August, 2009 23 ICS1893CF Data Sheet Rev. J - Release Copyright © 2009, Integrated Device Technology, Inc. All rights reserved. Figure 5-3 shows typical biasing and LED connections for the ICS1893CF. Figure 5-3. ICS1893CF LED - PHY Interface ICS1893CF 10K Ω 86 4 3 1 P4RD P3TD P2LI P1CL P0AC REC TRANS LINK ACTIVITY 10K Ω LED 1K Ω 10K Ω LED 1K Ω 10K Ω VDD COL LED 1K Ω 10K Ω This circuit decodes to PHY address = 1. Notes: 1. All LED pins must be set during reset. 2. Caution: PHY address 00 tri-states the MII interface. Don’t use PHY address 00. 3. For more reliable address capture during power-on reset, add a 10K Ω resistor across the LED. |
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