CPC5621 datasheet(12/17 Pages) CLARE

12 / 17 page

CPC5620/CPC5621

www.clare.com

R04

signal and coupled across the electrical isolation

barrier by a reflective dome.

On the equipment’s low voltage side of the barrier, the

receive signal is converted by a photodiode into a

photocurrent. The photocurrent, a linear

representation of the receive signal, is amplified and

converted to a differential voltage output on RX+ and

RX-.

Variations in gain are controlled to within ±0.4 dB by

factory gain trim, which sets the output to unity gain.

To accommodate single-supply operation, LITELINK

includes a small DC bias on the RX outputs of 1.0VDC.

Most applications should AC couple the RX outputs as

shown in Figure 5.

LITELINK may be used for differential or single-ended

output as shown in Figure 5. Single-ended use will

produce 6 dB less signal output amplitude. Do not

exceed 0 dBm into 600

Ω (2.2 V

P-P) signal input with

the standard application circuit. See application note

AN-157, Increased LITELINK III Transmit Power for more

information.

Figure 5. Differential and Single-ended Receive

Path Connections to LITELINK

3.3.2 Transmit Signal Path

Connect transmit signals from the low-voltage side

equipment to the TX+ and TX- pins of LITELINK. Do

not exceed a signal level of 0 dBm in 600

Ω (or 2.2

VP-P). Differential transmit signals are converted to

single-ended signals in LITELINK. The signal is

coupled to the transmit photodiode amplifier in a

similar manner to the receive path. See application

note AN-157, Increased LITELINK III Transmit Power for

more information.

The output of the photodiode amplifier is coupled to a

voltage-to-current converter via a transconductance

stage where the transmit signal modulates the

telephone line loop current. As in the receive path,

gain is set to unity at the factory, limiting insertion loss

variation to ±0.4 dB.

Differential and single-ended transmit signals into

LITELINK should not exceed a signal level of 0 dBm

referenced to 600

Ω (or 2.2 V

P-P). For output power

levels above 0dBm consult the application note

AN-157, Increased LITELINK III Transmit Power for more

information.

Figure 6. Differential and Single-ended Transmit

Path Connections to LITELINK

3.4 Start-up Requirements

OH must be de-asserted (set logic high) once after

power-up for at least 50ms to transfer internal gain

trim values within LITELINK. This would be normal

operation in most applications. Failure to comply with

this requirement will result in transmission gain errors

and possibly distortion.

3.5 DC Characteristics

The CPC5620 and CPC5621 are designed for

worldwide application, including use under the

requirements of TBR-21. The ZDC, DCS1, and DCS2

pins control the VI slope characteristics of LITELINK.

Selecting appropriate resistor values for RZDC (R16)

and RDCS (R15) in the provided application circuits

assure compliance with DC requirements.

RX+

RX-

RX+

RX-

0.1

µF

0.1

µF

0.1

µF

LITELINK

Low-Voltage Side CODEC

or Voice Circuit

LITELINK

TXA1

TXA2

0.1

µf

Low-Voltage Side CODEC or

Transmit Circuit

Low-Voltage Side CODEC or

Transmit Circuit

TX-

TX+

TXA1

TX-

TX+

0.1

µf

0.1

µf

0.1

µf

CPC5621 датащи(PDF) 12 Page - Clare, Inc.

CPC5621 датащи(HTML) 12 Page - Clare, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

датащи скачать

ссылки URL