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CAP1088 датащи(PDF) 39 Page - SMSC Corporation

номер детали CAP1088
подробное описание детали  8 Channel Capacitive Touch Sensor with 8 LED Drivers
PDF  72 Pages
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производитель  SMSC [SMSC Corporation]
домашняя страница  http://www.smsc.com
Logo SMSC - SMSC Corporation

CAP1088 датащи(HTML) 39 Page - SMSC Corporation

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8 Channel Capacitive Touch Sensor with 8 LED Drivers
Datasheet
SMSC CAP1088
39
Revision 1.1 (08-05-09)
DATASHEET
Bits 3 - 0 - BASE_SHIFT[3:0] - Controls the scaling and data presentation of the Base Count registers.
The higher the value of these bits, the larger the range and the lower the resolution of the data
presented. The scale factor represents the multiplier to the bit-weighting presented in these register
descriptions.
APPLICATION NOTE: The BASE_SHIFT[3:0] bits normally do not need to be updated. These settings will not affect
touch detection or sensitivity. These bits are sometimes helpful in analyzing the Cap Sensing
board performance and stability.
5.6
Configuration Register
The Configuration register controls general global functionality that affects the entire device.
Bit 7 - TIMEOUT - Enables the timeout and idle functionality of the SMBus protocol.
‘0’ (default) - The SMBus timeout and idle functionality are disabled. The SMBus interface will not
time out if the clock line is held low. Likewise, it will not reset if both the data and clock lines are
held high for longer than 150us. This is used for I2C compliance.
‘1’ - The SMBus timeout and idle functionality are enabled. The SMBus interface will time out if the
clock line is held low for longer than 30ms. Likewise, it will reset if both the data and clock lines
are held high for longer than 150us.
Bit 6 - WAKE_CFG - Configures the operation of the WAKE pin.
‘0’ (default) - The WAKE pin is not asserted when a touch is detected while the device is in Standby.
It will still be used to wake the device from Deep Sleep when driven high.
Table 5.8 BASE_SHIFT Bit Decode
BASE_SHIFT[3:0]
DATA SCALING
FACTOR
32
1
0
00
0
0
1x
00
0
1
2x
00
1
0
4x
00
1
1
8x
01
0
0
16x
01
0
1
32x
01
1
0
64x
0
1
1
1
128x
1
0
0
0
256x
All others
256x
(default = 1111b)
Table 5.9 Configuration Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
20h
R/W
Configuration
TIMEOUT
WAKE_
CFG
BLK_ DIG_
NOISE
BLK_ ANA_
NOISE
MAX_DUR_
EN
-
-
-
20h



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