Single-Phase Power-Measurement

______________________________________________________________________________________ 15

RMS Current Continuous Output

(AUX Pin)

The AUX pin can be configured to output a 16-bit RMS

current value. Bit time is 2000 system clocks, or a typical

data rate of 4kbps. The bit format is pulse-width modula-

tion, in which each bit cell is divided into four time slices.

At the first time slice, the data line switches from a zero

state to a one state. Then, if the bit to be transmitted is a

zero, the data line switches back to zero after one time

slice. If the bit to be transmitted is a one, the data line

switches back to zero after three time slices.

A data frame consists of one complete 20-bit sample

word and a frame delimiter. The frame delimiter consists

of the data line idling in a low state for nominally four bit

The receiver detects the first rising edge of the sync

field and synchronizes on the 1100 pattern. The receiver

should be synchronized by the time the first data bit is

available. After 16 data bits, the data line becomes idle

bit begins.

The AUX pin can output continuous PWM as well by

setting the PWMOUT (DSPCFG.6) bit. The PWM output

period is 65,535 system clocks, or 8.19ms.

Applications Information

Grounds and Bypassing

Careful PCB layout significantly minimizes system-level

digital noise that could interact with the microcontroller

or peripheral components. The use of multilayer boards

is essential to allow the use of dedicated power planes.

The area under any digital components should be a

continuous ground plane if possible. Keep any bypass

capacitor leads short for best noise rejection and place

the capacitors as close to the leads of the devices as

possible.

CMOS design guidelines for any semiconductor require

that no pin be taken above supply voltage or below

ground. Violation of this guideline can result in a hard

failure (damage to the silicon inside the device) or a soft

failure (unintentional modification of memory contents).

Voltage spikes above or below the device’s absolute

maximum ratings can potentially cause a devastating IC

latchup.

Microcontrollers commonly experience negative volt-

age spikes through either their power pins or general-

purpose I/O pins. Negative voltage spikes on power pins

are especially problematic as they directly couple to the

internal power buses. Devices such as keypads can

conduct electrostatic discharges directly into the micro-

controller and seriously damage the device. System

designers must protect components against these tran-

sients that can corrupt system memory.

Specific Design Considerations for

MAXQ314-Based Systems

To reduce the possibility of coupling noise into the

microcontroller, the systems that use an external crystal

should be designed with a crystal in a metal case that

is grounded to the digital plane. Doing so reduces the

susceptibility of the design to fast transient noise.

Because the MAXQ314 is used in systems where high

voltages are present, care must be taken to route all

signal paths, both analog and digital, as far away as pos-

sible from the high-voltage components. It is possible to

construct more elaborate metering designs using mul-

tiple MAXQ314 devices. This can be accomplished by

for each device.

Additional Documentation

Designers must have the following documents to fully use

all the features of this device. This data sheet contains

pin descriptions, feature overviews, and electrical speci-

fications. Errata sheets contain deviations from published

specifications.

• MAXQ314 data sheet, which contains electrical/timing

specifications and pin descriptions

• MAXQ314 revision-specific errata sheet

(www.maxim-ic.com/errata)

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SYNC

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FRAME GAP

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