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25LC1024-E/MF датащи(PDF) 13 Page - Microchip Technology

номер детали 25LC1024-E/MF
подробное описание детали  1 Mbit SPI Bus Serial EEPROM
PDF  32 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

25LC1024-E/MF датащи(HTML) 13 Page - Microchip Technology

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© 2008 Microchip Technology Inc.
DS22064C-page 13
25LC1024
2.6
Data Protection
The following protection has been implemented to
prevent inadvertent writes to the array:
• The write enable latch is reset on power-up
• A write enable instruction must be issued to set
the write enable latch
• After a byte write, page write or STATUS register
write, the write enable latch is reset
•CS must be set high after the proper number of
clock cycles to start an internal write cycle
• Access to the array during an internal write cycle
is ignored and programming is continued
2.7
Power-On State
The 25LC1024 powers on in the following state:
• The device is in low-power Standby mode
(CS = 1)
• The write enable latch is reset
• SO is in high-impedance state
• A high-to-low-level transition on CS is required to
enter active state
TABLE 2-4:
WRITE-PROTECT FUNCTIONALITY MATRIX
WEL
(SR bit 1)
WPEN
(SR bit 7)
WP
(pin 3)
Protected Blocks
Unprotected Blocks
STATUS Register
0xx
Protected
Protected
Protected
10x
Protected
Writable
Writable
1
1
0
(low)
Protected
Writable
Protected
1
1
1
(high)
Protected
Writable
Writable
x
= don’t care



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