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MCP413X датащи(PDF) 47 Page - Microchip Technology |
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MCP413X датащи(HTML) 47 Page - Microchip Technology |
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47 / 88 page ![]() © 2008 Microchip Technology Inc. DS22060B-page 47 MCP413X/415X/423X/425X 7.0 DEVICE COMMANDS The MCP4XXX’s SPI command format supports 16 memory address locations and four commands. Each command has two modes. These are: • Normal Serial Commands • High-Voltage Serial Commands Normal serial commands are those where the CS pin is driven to VIL. High Voltage Serial Commands, CS pin is driven to VIHH, for compatibility with systems that also support the MCP414X/416X/424X/426X devices. High Voltage Serial Commands operate identically to their corresponding Normal Serial Command. In each mode, there are four possible commands. These commands are shown in Table 7-1. The 8-bit commands (Increment Wiper and Decre- ment Wiper commands) contain a Command Byte, see Figure 7-1, while 16-bit commands (Read Data and Write Data commands) contain a Command Byte and a Data Byte. The Command Byte contains two data bits, see Figure 7-1. Table 7-2 shows the supported commands for each memory location and the corresponding values on the SDI and SDO pins. Table 7-3 shows an overview of all the SPI commands and their interaction with other device features. 7.1 Command Byte The Command Byte has three fields, the Address, the Command, and 2 Data bits, see Figure 7-1. Currently only one of the data bits is defined (D8). This is for the Write command. The device memory is accessed when the master sends a proper Command Byte to select the desired operation. The memory location getting accessed is contained in the Command Byte’s AD3:AD0 bits. The action desired is contained in the Command Byte’s C1:C0 bits, see Table 7-1. C1:C0 determines if the desired memory location will be read, written, Incremented (wiper setting +1) or Decremented (wiper setting -1). The Increment and Decrement commands are only valid on the volatile wiper registers. As the Command Byte is being loaded into the device (on the SDI pin), the device’s SDO pin is driving. The SDO pin will output high bits for the first six bits of that command. On the 7th bit, the SDO pin will output the CMDERR bit state (see Section 7.3 “Error Condi- tion”). The 8th bit state depends on the the command selected. TABLE 7-1: COMMAND BIT OVERVIEW FIGURE 7-1: General SPI Command Formats. C1:C0 Bit States Command # of Bits 11 Read Data 16-Bits 00 Write Data 16-Bits 01 Increment 8-Bits 10 Decrement 8-Bits A D 3 A D 2 A D 1 A D 0 C 1 C 0 D 9 D 8 Memory Command Byte Data Address Bits Command Bits A D 3 A D 2 A D 1 A D 0 C 1 C 0 D 9 D 8 D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 Memory 16-bit Command Data Address Bits Command Bits 0 0 = Write Data 0 1 = INCR 1 0 = DECR 1 1 = Read Data C C 1 0 Command Bits 8-bit Command Command Byte Data Byte |
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