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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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25LC040A-E/ST датащи(PDF) 11 Page - Microchip Technology |
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25LC040A-E/ST датащи(HTML) 11 Page - Microchip Technology |
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11 / 30 page  © 2009 Microchip Technology Inc. DS21827F-page 11 25AA040A/25LC040A 2.6 Write Status Register Instruction (WRSR) The Write Status Register instruction (WRSR) allows the user to write to the nonvolatile bits in the STATUS regis- ter as shown in Table 2-2. See Figure 2-7 for the WRSR timing sequence. Four levels of protection for the array are selectable by writing to the appropriate bits in the STATUS register. The user has the ability to write-protect none, one, two or all four of the segments of the array as shown in Table 2-3. TABLE 2-3: ARRAY PROTECTION FIGURE 2-7: WRITE STATUS REGISTER TIMING SEQUENCE (WRSR) BP1 BP0 Array Addresses Write-Protected 00 none 01 upper 1/4 (180h-1FFh) 10 upper 1/2 (100h-1FFh) 11 all (000h-1FFh) SO SI CS 9 1011 12131415 01 0 0 0 0 00 76 5 4 21 0 Instruction Data to STATUS Register High-impedance SCK 0 2 34 56 7 1 8 3 Note: An internal write cycle (TWC) is initiated on the rising edge of CS after a valid write STATUS register sequence. |
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