LP78084 datasheet(15/20 Pages) POWER

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Preliminary Datasheet

LP78084

LP78084 – 02 Ver. 1.1 Datasheet

Nov.-2007

Page 15 of 22

Undervoltage Charge Current Limiting (UVCL)

The battery charger in the LP78084 includes undervoltage

charge current limiting that prevents full charge current

until the input supply voltage reaches approximately

300mV above the battery voltage ( △Vuvcl1). This feature

is particularly useful if the LP78084 is powered from a

supply with long leads (or any relatively high output

impedance). See Applications Information section for

further details.

Trickle Charge and Defective Battery Detection

At the beginning of a charge cycle, if the battery voltage is

below 2.95V, the battery charger goes into trickle charge

mode, reducing the charge current to 10% of the

programmed current. If the low battery voltage persists for

one quarter of the total time (1.125 hr), the battery is

assumed to be defective, the charge cycle terminates and

the STAT pin output pulses at a frequency of 2Hz with a

75% duty cycle. If, for any reason, the battery voltage rises

above 2.95V, the charge cycle will be restarted. To restart

the charge cycle (i.e., when the dead battery is replaced

with a discharged battery less than 2.95V), the charger

must be reset by removing the input voltage and reapplying

it or temporarily pulling the EN_BAT pin below the enable

threshold.

Battery Charger Shutdown Mode

The LP78084’s battery charger can be disabled by pulling

the EN_BAT pin below the shutdown threshold (VIL ). In

shutdown mode, the battery drain current is reduced to less

than 2 A

and the ADP supply current to about 5 A

provided the regulator is off. When the input voltage is not

present, the battery charger is in shutdown and the battery

drain current is less than 5 A.

STAT Status Output Pin

The charge status indicator pin has three states: pulldown,

pulse at 2Hz (see Defective Battery Detection) and high

impedance. The pulldown state indicates that the battery

charger is in a charge cycle. A high impedance state

indicates that the charge current has dropped below 10% of

the full-scale current or the battery charger is disabled.

When the timer runs out (4.5 hrs), the STAT pin is also

forced to the high impedance state. If the battery charger is

not in constant-voltage mode when the charge current

is forced to drop below 10% of the full-scale current by

UVCL, STAT will stay in the strong pulldown state.

Charge Current Soft-Start and Soft-Stop

The LP78084’s battery charger includes a soft-start circuit

to minimize the inrush current at the start of a charge cycle.

When a charge cycle is initiated, the charge current ramps

from

zero

full-scale

current

over

period

approximately 120uS. Likewise, internal circuitry slowly

ramps the charge current from full-scale to zero when the

battery charger is turned off or self terminates. This has the

effect of minimizing the transient current load on the power

supply during start-up and charge termination.

Timer and Recharge

The LP78084’s battery charger has an internal termination

timer that starts when the input voltage is greater than the

undervoltage lockout threshold and at least 11 0mV above

BAT, and the battery charger is leaving shutdown.

At power-up or when exiting shutdown, the charge time is

set to 4.5 hours. Once the charge cycle terminates, the

battery charger continuously monitors the BAT pin voltage

using a comparator with a 2ms filter time. When the average

battery voltage falls below 4.05V (which corresponds to

80%-90% battery capacity), a new charge cycle is initiated

and a 2.25 hour timer begins. This ensures that the battery is

kept at, or near, a fully charged condition and eliminates the

need for periodic charge cycle initiations. The STAT output

assumes a strong pulldown state during recharge cycles until

C/10 is reached or the recharge cycle terminates.

SWITCHING REGULATOR OPERATION:

The switching regulator in the LP78084 can be turned on by

pulling the ENB pin above VIH .

Main Control Loop

The switching uses a slop-compensated constant frequency,

current mode PWM architecture. Both the main (P-Channel

MOSFET) and synchronous (N-channel MOSFET) switches

are internal. During normal operation, the buck converter

regulates output voltage by switching at a constant

frequency and then modulating the power transferred to the

load each cycle using PWM comparator. It sums three

weighted differential signals: the output feedback voltage

from an external resistor divider, the main switch current

sense, and the slope-compensation ramp. It modulates

output power by adjusting the inductor-peak current during

the first half of each cycle. An N-channel, synchronous

switch turns on during the second half of each cycle (off

time). When the inductor current starts to reverse or when

the PWM reaches the end of the oscillator period, the

synchronous switch turns off. This keep excess

current from flowing backward through the inductor, from

the output capacitor to GND, or through the main and

synchronous switch to GND.

Switching Regulator Undervoltage Lockout

Whenever VINB is less than 2.6V, an undervoltage lockout

circuit keeps the regulator off, preventing unreliable

operation. However, if the regulator is already running and

the

battery

voltage

dropping,

the

undervoltage

comparator does not shut down the regulator until VIN B

drops below 2.4V.

Thermal Consideration

To avoid the switching regulator from exceeding the

maximum junction temperature, the user will need to do a

thermal analysis. The goal of the thermal analysis is to

determine whether the operating conditions exceed the

maximum

junction

temperature

the

part.

The

temperature rise is given by:

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