MB85R2002

4

DS05-13108-4E

■ FUNCTION TRUTH TABLE

: Latch address and latch data at falling edge,

: Latch address and latch data at rising edge

*1 : OE control of the Pseudo-SRAM means the valid address at the falling edge of OE to read.

*2 : WE control of the Pseudo-SRAM means the valid address and data at the falling edge of WE to write.

Mode

CE1CE2

WE

OE

LB

UB

I/O1 to I/O8

I/O9 to I/O16

Supply Current

Standby Pre-charge

H

X

XXXX

High-Z

High-Z

Standby

X

L

XXXX

XX

H

H

XX

XXXX

H

H

Read

L

H

HL

L

L

Dout

Dout

Operation

L

H

Dout

High-Z

H

L

High-Z

Dout

Read

(Pseudo-SRAM,

LH

H

L

L

Dout

Dout

L

H

Dout

High-Z

H

L

High-Z

Dout

Write

L

H

LX

LL

Din

Din

L

H

Din

High-Z

HL

High-Z

Din

Write

(Pseudo-SRAM,

LH

H

LL

Din

Din

L

H

Din

High-Z

HL

High-Z

Din