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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32F101ZC датащи(PDF) 72 Page - STMicroelectronics |
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STM32F101ZC датащи(HTML) 72 Page - STMicroelectronics |
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72 / 106 page  Electrical characteristics STM32F101xC, STM32F101xD, STM32F101xE 72/106 Doc ID 14610 Rev 7 NAND controller waveforms and timings Figure 35 through Figure 38 represent synchronous waveforms and Table 40 provides the corresponding timings. The results shown in this table are obtained with the following FSMC configuration: ● COM.FSMC_SetupTime = 0x01; ● COM.FSMC_WaitSetupTime = 0x03; ● COM.FSMC_HoldSetupTime = 0x02; ● COM.FSMC_HiZSetupTime = 0x01; ● ATT.FSMC_SetupTime = 0x01; ● ATT.FSMC_WaitSetupTime = 0x03; ● ATT.FSMC_HoldSetupTime = 0x02; ● ATT.FSMC_HiZSetupTime = 0x01; ● Bank = FSMC_Bank_NAND; ● MemoryDataWidth = FSMC_MemoryDataWidth_16b; ● ECC = FSMC_ECC_Enable; ● ECCPageSize = FSMC_ECCPageSize_512Bytes; ● TCLRSetupTime = 0; ● TARSetupTime = 0; td(D-NWE) FSMC_D[15:0] valid before FSMC_NWE high 13THCLK ns tw(NIOWR) FSMC_NIOWR low width 8THCLK + 3 ns tv(NIOWR-D) FSMC_NIOWR low to FSMC_D[15:0] valid 5THCLK +1 ns th(NIOWR-D) FSMC_NIOWR high to FSMC_D[15:0] invalid 11THCLK ns td(NCE4_1-NIOWR) FSMC_NCE4_1 low to FSMC_NIOWR valid 5THCLK+3ns ns th(NCEx-NIOWR) th(NCE4_1-NIOWR) FSMC_NCEx high to FSMC_NIOWR invalid FSMC_NCE4_1 high to FSMC_NIOWR invalid 5THCLK – 5 ns td(NIORD-NCEx) td(NIORD-NCE4_1) FSMC_NCEx low to FSMC_NIORD valid FSMC_NCE4_1 low to FSMC_NIORD valid 5THCLK + 2.5 ns th(NCEx-NIORD) th(NCE4_1-NIORD) FSMC_NCEx high to FSMC_NIORD invalid FSMC_NCE4_1 high to FSMC_NIORD invalid 5THCLK – 5 ns tsu(D-NIORD) FSMC_D[15:0] valid before FSMC_NIORD high 4.5 ns td(NIORD-D) FSMC_D[15:0] valid after FSMC_NIORD high 9 ns tw(NIORD) FSMC_NIORD low width 8THCLK + 2 ns 1. CL = 15 pF. 2. Based on characterization, not tested in production. Table 39. Switching characteristics for PC Card/CF read and write cycles(1)(2) (continued) Symbol Parameter Min Max Unit |
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