CS2100-CP

DS840F1

25

8. REGISTER DESCRIPTIONS

In I²C Mode all registers are read/write unless otherwise stated. In SPI mode all registers are write only. All “Re-

served” registers must maintain their default state to ensure proper functional operation. The default state of each

bit after a power-up sequence or reset is indicated by the shaded row in the bit decode table and in the “Register

Quick Reference” on page 24.

Control port mode is entered when the device recognizes a valid chip address input on its I²C/SPI serial control pins

and the EnDevCfg1 and EnDevCfg2 bits are set to 1.

8.1

Device I.D. and Revision (Address 01h)

8.1.1

Device Identification (Device[4:0]) - Read Only

I.D. code for the CS2100.

8.1.2

Device Revision (Revision[2:0]) - Read Only

CS2100 revision level.

8.2

Device Control (Address 02h)

8.2.1

Unlock Indicator (Unlock) - Read Only

Indicates the lock state of the PLL.

8.2.2

Auxiliary Output Disable (AuxOutDis)

This bit controls the output driver for the AUX_OUT pin.

7

6

5

432

10

Device4

Device3

Device2

Device1

Device0

Revision2

Revision1

Revision0

Device[4:0]

Device

00000

CS2100.

REVID[2:0]

Revision Level

100

B2 and B3

110

C1

76543210

Unlock

Reserved

Reserved

Reserved

Reserved

Reserved

AuxOutDis

ClkOutDis

Unlock

PLL Lock State

0

PLL is Locked.

1

PLL is Unlocked.

AuxOutDis

Output Driver State

0

AUX_OUT output driver enabled.

1

AUX_OUT output driver set to high-impedance.

Application:

“Auxiliary Output” on page 20