LT3082EST datasheet(12/20 Pages) LINER

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LT3082

3082f

APPLICATIONS INFORMATION

The LT3082 uses a unity-gain follower from the SET pin

to the OUT pin. Therefore, multiple possibilities exist

(besides a SET pin resistor) to set output voltage. For

example, using a high accuracy voltage reference from

SET to GND removes the errors in output voltage due to

reference current tolerance and resistor tolerance. Active

driving of the SET pin is acceptable.

The typical noise scenario for a linear regulator is that the

output voltage setting resistor divider gains up the noise

reference, especially if VOUT is much greater than VREF. The

LT3082’s noise advantage is that the unity-gain follower

presents no noise gain whatsoever from the SET pin to the

output. Thus, noise ﬁgures do not increase accordingly.

Error ampliﬁer noise is typical 100nV/√Hz (33μVRMS over

the 10Hz to 100kHz bandwidth). The error ampliﬁer’s noise

is RMS summed with the other noise terms to give a ﬁnal

noise ﬁgure for the regulator.

Curves in the Typical Performance Characteristics sec-

tion show noise spectral density and peak-to-peak noise

characteristics for both the reference current and error

ampliﬁer over the 10Hz to 100kHz bandwidth.

Load Regulation

The LT3082 is a ﬂoating device. No ground pin exists on

the packages. Thus, the IC delivers all quiescent current

and drive current to the load. Therefore, it is not possible

to provide true remote load sensing. The connection resis-

tance between the regulator and the load determines load

regulation performance. The data sheet’s load regulation

speciﬁcation is Kelvin sensed at the package’s pins. Nega-

tive-side sensing is a true Kelvin connection by returning

the bottom of the voltage setting resistor to the negative

side of the load (see Figure 6).

Connected as shown, system load regulation is the sum

of the LT3082’s load regulation and the parasitic line

resistance multiplied by the output current. To minimize

load regulation, keep the positive connection between the

regulator and load as short as possible. If possible, use

large diameter wire or wide PC board traces.

Figure 6. Connections for Best Load Regulation

SET

–

LT3082

10μA

3082 F06

OUT

RSET

PARASITIC

RESISTANCE

LOAD

Thermal Considerations

The LT3082’s internal power and thermal limiting circuitry

protects itself under overload conditions. For continuous

normal load conditions, do not exceed the 125°C maximum

junction temperature. Carefully consider all sources of

thermal resistance from junction-to-ambient. This includes

(but is not limited to) junction-to-case, case-to-heat sink

interface, heat sink resistance or circuit board-to-ambient

as the application dictates. Consider all additional, adjacent

heat generating sources in proximity on the PCB.

Surface mount packages provide the necessary heatsinking

by using the heat spreading capabilities of the PC board,

copper traces and planes. Surface mount heat sinks, plated

through-holes and solder-ﬁlled vias can also spread the

heat generated by power devices.

Junction-to-case thermal resistance is speciﬁed from

the IC junction to the bottom of the case directly, or

the bottom of the pin most directly, in the heat path.

This is the lowest thermal resistance path for heat ﬂow.

Only proper device mounting ensures the best possible

thermal ﬂow from this area of the package to the heat

sinking material.

Note that the Exposed Pad of the DFN package and the

tab of the SOT-223 package is electrically connected to

the output (VOUT).

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