LE24L042CS

6 EEPROM write operation

6-1. Byte writing

When the EEPROM receives the 7-bit device address and write command code “0” after the start condition, it

generates an acknowledge signal. After this, if it receives the 8-bit word address, generates an acknowledge signal,

receives the 8-bit write data, generates an acknowledge signal and then receives the stop condition, the internal write

operation of the EEPROM in the designated memory address will start. Rewriting is completed in the tWC period

after the stop condition. During an EEPROM internal write operation, no input is accepted and no acknowledge

signals are generated.

Word Address

0

1

0

S1

1

W

ACK

ACK

ACK

SDA

A7 A6 A5 A4 A3 A2 A1 A0

D7 D6 D5 D4 D3 D2 D1 D0

Data

R/W

S2

A8

6-2. Page writing

This product enables pages with up to 16 bytes to be written. The basic data transfer procedure is the same as for byte

writing: Following the start condition, the 7-bit device address and write command code “0,” word address (n), and

data (n) are input in this order while confirming acknowledge “0” every 9 bits. The page write mode is established if,

after data (n) is input, the write data (n+1) is input without inputting the stop condition. After this, the write data

equivalent to the largest page size can be received by a continuous process of repeating the receiving of the 8-bit

write data and generating the acknowledge signals.

At the point when the write data (n+1) has been input, the lower 4 bits (A0-A3) of the word addresses are

automatically incremented to form the (n+1) address. In this way, the write data can be successively input, and the

word address on the page is incremented each time the write data is input. If the write data exceeds 16 bytes or the

last address of the page is exceeded, the word address on the page is rolled over. Write data will be input into the

same address two or more times, but in such cases the write data that was input last will take effect. Finally, the

EEPROM internal write operation corresponding to the page size for which the write data is received starts from the

designated memory address when the stop condition is received.

SDA

Memory Address(n)

0

1

0

1

W

ACK

ACK

A7 A6 A5 A4 A3 A2 A1 A0

D7 D6 D5 D4 D3 D2 D1 D0

Data(n)

ACK

D7 D6 - D1 D0

ACK

• • • • •

Data(n+1)

R/W

S1

S2

A8

ACK

D7 D6 - D1 D0

D7 D6 - D1 D0

D7 D6 - D1 D0

D7 D6 - D1 D0

ACK

ACK

• • • • •

Data(n+x)

6-3. Acknowledge polling

Acknowledge polling is used to find out when the EEPROM internal write operation is completed. When the stop

condition is received and the EEPROM starts rewriting, all operations are prohibited, and no response can be given to

the signals sent by the master device. Therefore, in order to find out when the EEPROM internal write operation is

completed, the start condition, device address and write command code are sent from the master device to the

EEPROM (slave device), and the response of the slave device is detected.

In other words, if the slave device does not send the acknowledge signal, it means that the internal write operation is

in progress; conversely, if it does send the acknowledge signal, it means that the internal write operation has been

completed.

0

1

0

1

W

NO ACK

SDA

• • • • •

0

10

1

NO ACK

0

1

0

1

ACK

R/W

S1

S2

A8

S1

S2

A8

S1

S2

A8

WW

R/W

R/W

During Write

End of Write

During Write

No.A1440-7/10