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TDF8599ATH датащи(PDF) 34 Page - NXP Semiconductors |
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TDF8599ATH датащи(HTML) 34 Page - NXP Semiconductors |
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34 / 54 page ![]() TDF8599A_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 30 June 2009 34 of 54 NXP Semiconductors TDF8599A I2C-bus controlled dual channel class-D power amplifier 14.2 Output power estimation (Parallel mode) Figure 28 and Figure 29 show the estimated output power at THD = 0.5 % and THD = 10 % as a function of the supply voltage for different load impedances in parallel mode. THD = 0.5 %. RDSon = 0.2 Ω (at Tj = 100 °C), Rs = 0.05 Ω, tw(min) = 190 ns and IO(ocp) = 8 A (minimum). (1) RL =2 Ω. (2) RL =4 Ω. THD = 10 %. RDSon = 0.2 Ω (at Tj = 100 °C), Rs = 0.05 Ω, tw(min) = 190 ns and IO(ocp) = 8 A (minimum). (1) RL =2 Ω. (2) RL =4 Ω. Fig 26. Po as a function of VP in stereo mode with THD = 0.5 % Fig 27. Po as a function of VP in stereo mode with THD = 10 % VP (V) 840 32 24 16 (1) (2) 001aaj181 60 40 100 140 20 80 120 Po (W) 0 VP (V) 840 32 24 16 (1) (2) 001aaj182 80 40 120 160 Po (W) 0 |
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