PCA2003_2

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 02 — 21 July 2009

6 of 21

NXP Semiconductors

PCA2003

32 kHz watch circuit with programmable adaptive motor pulse

The step detection phase is initiated after the motor driving pulse. In phase 1 P1 and P2

are first closed for 0.98 ms and then in phase 2 all four drive switches (P1, N1, P2 and N2)

are opened for 0.98 ms. As a result, the energy stored in the motor inductance is reduced

as fast as possible.

The induced current caused by the residual motor movement is then sampled in phase 3

(closing P3 and P2) and in phase 4 (closing P1 and P4). For step detection in the opposite

direction P1 and P4 are closed during phase 3 and P2 and P3 during phase 4 (see

Figure 6).

The condition for a successful motor step is a positive step detection pulse (current in the

same direction as in the driving phase) followed by a negative detection pulse within a

given time limit. This time limit can be programmed between 3.9 ms and 10.7 ms (in steps

of 0.98 ms) in order to ensure a safe and correct step detection under all conditions (for

instance magnetic fields). The step detection phase stops after the last 31.25 ms, after the

start of the motor driving pulse.

Fig 6.

Step detection sequence and corresponding sampling voltage

mgw569

0.98 ms

(motor shorted)

sampling

voltage

sampling

voltage

positive detection level

negative detection level

programmable time limit

OTP C4 to C6

sampling

positive detection

negative detection

sampling results

motor shorted

sampling

61

µs

0.49 ms

t

t

t