TUSB2040A

4-PORT HUB FOR THE UNIVERSAL SERIAL BUS

WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS288B – FEBRUARY 1998 – REVISED MARCH 1998

9

POST OFFICE BOX 655303

APPLICATION INFORMATION

USB design notes

The following sections provide block diagram examples of how to implement the TUSB2040A device. Please

note, even though no resistors are shown, pull-up, pull-down and series resistors must still be used to properly

implement this device. Figure 1 shows a few resistors that must be used for the USB lines, and for a general

reference design, one is available on the TI USB web site.

Figure 6 is a block diagram example of how to connect the external EEPROM if configurable Product ID and

Vendor ID are desired. Please note that the pin numbers in Figure 6 are for the DIP package.

Figure 7 and 8 are examples of how to generate the 48-MHz clock signal. Figure 9 shows the EEPROM Read

Operation Timing Diagram. Figures 10, 11 and 12 illustrate how to connect the TUSB2040A device for different

power source and port power management combinations.

† Figures 7 and 8 are two examples of how to generate the 48-MHz clock signal.

DP0

DM0

SDA

TUSB2040A USB Hub

System

Power-On Reset

Regulator

Power

Switching

OVRCUR1 –

OVRCUR4

PWRON1 –

PWRON4

SCL

RESET

XTAL1

EXTMEM

VCC

GND

DP1 – DP4

DM1 – DM4

GND

Vbus

5 V GND

XTAL2

USB Data lines

and Power to

Downstream

Ports

Bus or Local Power

48-MHz Clock

Signal†

4

4

4

4

23

22

18

4

5

10

9

13, 27

6, 24

7, 11, 14, 16

3, 1, 26, 19

8, 12, 15, 17

2, 28, 25, 20

5

8

6

2

4

3

ORG

VCC

VSS

D

Q

C

S

1

EEPROM

3.3 V

1 k

Ω

21

‡ Pin numbers shown are for the N package.

Figure 6. Typical Application of the TUSB2040 USB Hub

XTAL1

220

Ω

XTAL2

Ceralock

Resonator

NOTE A: A simple way to achieve the required 48-MHz clock signal is to use a resonator such as the Ceralock™ resonator in Figure 7.

MuRata Electronics, Inc. manufactures a surface mount version, P/N CSACV48.00MXJ040, and a dip version, P/N

CSA48.00MXZ040. The 220

Ω resistor is used to tune the 48-MHz signal. The circuit functions properly without the capacitors,

but in order to decrease EMI emissions, the capacitors are used to decrease the amplitude of the signal. The exact values of the

capacitors are dependent on the capacitance of the board layout. Increasing the capacitance decreases the amplitude of the clock

signal. For the 4-layer PCB tested, 22 pF capacitors were used. If the capacitors are too large, the amplitude of the clock signal

will not be large enough for the successful numeration of the TUSB2040A by the USB host.

Figure 7. Resonator Clock Circuit

Ceralock is a trademark of MuRata Electronics Incorporated