June 2009

PCS1P2192A

rev 1.0

VDP Multiple Pixel Clock Generator

2 of 8

Notice: The information in this document is subject to change without notice.

CLKOUT

REFOUT

Pin Configuration

Pin Description

Pin#

Pin Name

Type

Description

1

CLKIN

I

20MHz external reference clock input.

2

GND

P

Ground Connection.

3

S0

I

Frequency select. Digital logic input used to select output frequency. Has an internal

pull up resistor. (Refer Frequency Selection Table)

4

S1

I

Frequency select. Digital logic input used to select output frequency. Has an internal

pull up resistor. (Refer Frequency Selection Table)

5

S2

I

Frequency select. Digital logic input used to select output frequency. Has an internal

pull up resistor. (Refer Frequency Selection Table)

6

REFOUT

O

Reference clock output

7

CLKOUT

O

Clock output

8

P

Device Power Supply

Frequency Selection Table

S2

S1

S0

CLKOUT (MHz)

0

0

0

108

0

0

1

27

0

1

0

33.2

0

1

1

85

1

0

0

65

1

0

1

25

1

1

0

45

1

1

1

40

S2

6

1

2

3

4

5

8

CLKIN

GND

S1

S0

7

PCS1P2192A