TMS77C82 datasheet(38/43 Pages) TI

38 / 43 page

TMS370Cx32

8-BIT MICROCONTROLLER

SPNS015C – FEBRUARY 1990 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

switching characteristics and timing requirements (see Note 10 and Figure 16)

NO.

PARAMETER

MIN

MAX

UNIT

Cycle time SYSCLK (system clock)

Divide-by-4

200

2000

Cycle time, SYSCLK (system clock)

Divide-by-1

200

500

tw(SCL)

Pulse duration, SYSCLK low

0.5 tc–20

0.5 tc

tw(SCH)

Pulse duration, SYSCLK high

0.5 tc

0.5 tc + 20

NOTE 10:

tc = system clock cycle time = 1 /SYSCLK

SYSCLK

Figure 16. SYSCLK Timing

general purpose output signal switching time requirements (see Figure 17)

MIN

NOM

MAX

UNIT

Rise time

Fall time

Figure 17. Signal Switching Timing

recommended EEPROM timing requirements for programming

MIN

MAX

UNIT

tw(PGM)B

Pulse duration, programming signal to ensure valid data is stored (byte mode)

tw(PGM)AR

Pulse duration, programming signal to ensure valid data is stored (array mode)

recommended EPROM operating conditions for programming

MIN

NOM

MAX

UNIT

VCC

Supply voltage

4.75

5.5

VPP

Supply voltage at MC pin

13.2

13.5

IPP

Supply current at MC pin during programming (VPP = 13 V)

SYSCLK

System clock

Divide-by-4

0.5

MHz

SYSCLK

System clock

Divide-by-1

MHz

recommended EPROM timing requirements for programming

MIN

NOM

MAX

UNIT

tw(EPGM)

Pulse duration, programming signal (see Note 11)

0.40

0.50

NOTE 11: Programming pulse is active when both EXE (EPCTL.0) and VPPS (EPCTL.6) are set.

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