TLK2500IRCP

1.6 Gbps to 2.5 Gbps TRANSCEIVER

SLLS356B – JUNE 1999 – REVISED JANUARY 2000

13

POST OFFICE BOX 655303

TTL input electrical characteristics over recommended operating conditions, TTL signals:

TXD0–TXD15, GTX_CLK, LOOPEN, LCKREFN (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

NOM

MAX

UNIT

VIH

High-level input voltage

See Figure 7

2

3.6

V

VIL

Low-level input voltage

See Figure 7

0.80

V

IIH

Input high current

VDD = MAX,

VIN = 2 V

40

µA

IIL

Input low current

VDD = MAX,

VIN = 0.4 V

–600

µA

CI

Input capacitance

4

pF

tr

Rise time, GTX_CLK, TX_EN, TX_ER, TXD

0.8 V to 2 V,

C = 5 pF, See Figure 7

1

ns

tf

Fall time, GTX_CLK, TX_EN, TX_ER, TXD

2 V to 0.8 V,

C = 5 pF, See Figure 7

1

ns

tsetup

TXD, TX_EN, TX_ER setup to

↑GTX_CLK

See Figure 7

1.5

ns

thold

TXD, TX_EN, TX_ER hold to

↑GTX_CLK

See Figure 7

0.4

ns

TTL output switching characteristics over recommended operating conditions (unless otherwise

noted)

PARAMETER

TEST CONDITIONS

MIN

NOM

MAX

UNIT

VOH

High-level output voltage

IOH = –1 mA,

VDD = MIN

2.10

2.3

V

VOL

Low-level output voltage

IOH = 1 mA,

VDD = MIN

GND

0.25

0.5

V

SR(r)

Magnitude of RX_CLK, RX_ER, RX_DV, RXD slew rate

(rising)

0 8 to2V

C = 5 pF,

0.5

V/ns

SR(f)

Magnitude of RX_CLK, RX_ER, RX_DV, RXD slew rate

(falling)

0.8 to 2 V,

C

5 F,

See Figure 7

0.5

V/ns

t

t

RXD RX DV RX ER setup to

↑ RX CLK

50%, 80 MHz,

See Figure 7

5.4

ns

tsetup

RXD, RX_DV, RX_ER setup to

↑ RX_CLK

50%, 125 MHz,

See Figure 7

3

ns

thold

RXD RX DV RX ER hold to

↑ RX CLK

50%, 80 MHz,

See Figure 7

5.4

ns

thold

RXD, RX_DV, RX_ER hold to

↑ RX_CLK

50%, 125 MHz,

See Figure 7

3

ns

RX_ER, RX_DV, RXD

2 V

0.8 V

2 V

0.8 V

GTX_CLK

RX_CLK

TX_ER, TX_EN, TXD

tSETUP

tHOLD

Figure 7. TTL Data Input/Output Valid Levels for AC Measurements