TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

SUPPLY-VOLTAGE SUPERVISORS

SLVS028E – APRIL 1983 – REVISED JULY 1999

7

POST OFFICE BOX 655303

Figure 2

30

26

22

18

02

4

6

34

38

ASSERTION TIME

vs

LOAD RESISTANCE

42

810

RL – Load Resistance – kΩ

RESET tr

RESET tf

VCC = 5 V

CT = 0.1 µF

CL = 10 pF

TA = 25°C

Figure 3

4

3

2

1

02

4

6

5

6

DEASSERTION TIME

vs

LOAD RESISTANCE

7

810

0

RL – Load Resistance – kΩ

RESET tf

RESET tr

VCC = 5 V

CT = 0.1 µF

CL = 10 pF

TA = 25°C

Figure 4

32

28

24

20

0

25

50

75

100

125

36

40

ASSERTION TIME

vs

LOAD CAPACITANCE

44

150

175

200

RESET tr

RESET tf

VCC = 5 V

CT = 0.1 µF

RL = 4.7 kΩ

TA = 25°C

CL – Load Capacitance – pF

Figure 5

2.4

2

1.6

1.2

2.8

3.2

DEASSERTION TIME

vs

LOAD CAPACITANCE

3.6

RESET tf

RESET tr

VCC = 5 V

CT = 0.1 µF

RL = 4.7 kΩ

TA = 25°C

0

25

50

75

100

125

150

175

200

CL – Load Capacitance – pF

0.8

† For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted

plateauing in either output waveform during switching.