TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C

TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M

HIGH-PERFORMANCE IMPACT-X

SRPS006D – D3115, MAY 1988 – REVISED MARCH 1992

POST OFFICE BOX 655303

17

PARAMETER MEASUREMENT INFORMATION

tsu

S1

R2

CL

(see Note A)

LOAD CIRCUIT FOR

3-STATE OUTPUTS

(3.5 V) [3 V]

(0.3 V) [0]

1.5 V

1.5 V

th

1.5 V

tpd

tpd

tpd

tpd

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOH

VOH

VOL

VOL

1.5 V

1.5 V

1.5 V

1.5 V

tw

1.5 V

1.5 V

VOL

VOH

VOH –0.5 V

ten

ten

tdis

tdis

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

VOLTAGE WAVEFORMS

PULSE DURATIONS

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

R1

VOL +0.5 V

5 V

(3.5 V) [3 V]

(0.3 V) [0]

(3.5 V) [3 V]

(0.3 V) [0]

(3.5 V) [3 V]

(0.3 V) [0]

(3.5 V) [3 V]

(0.3 V) [0]

(3.5 V) [3 V]

(0.3 V) [0]

From Output

Under Test

Test

Point

Input

Out-of-Phase

Output

(see Note D)

Timing

Input

Data

Input

In-Phase

Output

High-Level

Pulse

Low-Level

Pulse

Output

Control

(low-level

enabling)

Waveform 1

S1 Closed

(see Note B)

Waveform 2

S1 Open

(see Note B)

NOTES: A. CL includes probe and jig capacitance and is 50 pF for tpd and ten, 5 pF for tdis.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2

is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses have the following characteristics: For C suffix, use the voltage levels indicated in parentheses ( ), PRR

≤ 1 MHz,

tr = tf = 2 ns, duty cycle = 50%; For M suffix, use the voltage levels indicated in brackets [ ], PRR ≤ 10 MHz, tr and tf ≤ 2 ns, duty

cycle = 50%

D. When measuring propagation delay times of 3-state outputs, switch S1 is closed.

E. Equivalent loads may be used for testing.

Figure 6. Load Circuit and Voltage Waveforms