SN74ALVC7803 datasheet(12/14 Pages) TI

12 / 14 page

SN74ALVC7803

512

× 18

CLOCKED FIRST-IN, FIRST-OUT MEMORY

SDAS274 – JANUARY 1995

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

100

120

140

102030405060708090

SUPPLY CURRENT

CLOCK FREQUENCY

fclock – Clock Frequency – MHz

VCC = 3.6 V

VCC = 3.3 V

VCC = 3 V

fdata = 1/2 fclock

TA = 75°C

CL = 0 pF

Figure 7

calculating power dissipation

With ICCf taken from Figure 7, the dynamic power (Pd), based on all data outputs changing states on each read,

can be calculated by using:

Pd = VCC × [ICC(f) + (N × ∆ICC × dc)] + ∑(CL × VCC2 × fo)

A more accurate total power (PT) can be calculated if quiescent power (Pq) is also taken into consideration.

Quiescent power (Pq) can be calculated using:

Pq = VCC × [ICCI + (N × ∆ICC × dc)]

Total power would be:

PT = Pd + Pq

The above equations provide worst-case power calculations.

Where:

= number of inputs driven by TTL levels

∆ICC = increase in power supply current for each input at a TTL high level

= duty cycle of inputs at a TTL high level of 3.4 V

= output capacitance load

= switching frequency of an output

ICCI

= idle current, supply current when FIFO is idle

≈ pF × fclock = 0.2 × fclock

(current is due to free-running clocks)

= power factor (the slope of idle current versus clock frequency).

ICCf

= active current, supply current when FIFO is transferring data

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