© IMP, Inc.

IMP8980D DS-5-00

12

Pin #

Name

Description

40

44

DIP

PLCC

1

2

DTA

Data Acknowledgement (Open Drain Output). This is

the data acknowledgement on the microprocessor

interface. This pin is pulled low to signal that the chip

has processed the data. A 909

Ω, 1/4W, resistor is

recommended to be used as a pullup.

2

3

STi0

ST-BUS Input 0 to 2 (Inputs). These are the inputs for

-4

-5

-STi2

the 2048 kbit/s ST-BUS input streams.

5

7

STi3

ST-BUS Input 3 to 7 (Inputs).

-9

-11

-STi7

These are the inputs for the 2048 kbit/s ST-BUS

input streams.

10

12

VDD Power Input. Positive Supply.

11

13

F0i

Framing 0-Type (Input). This is the input for the frame

synchronization pulse for the 2048 kbit/s ST-BUS

streams. A low on this input causes the internal

counter to reset on the next negative transition of C4i

12

14

C4i

4.096 MHz Clock (Input). ST-BUS bit cell boundaries

lie on the alternate falling edges of this clock.

13

15

A0

Address 0 to 2 (Inputs). These are the inputs for the

-15

-17

-A2

address lines on the microprocessor interface.

16

19

A3

Address 3 to 5 (Inputs). These are the inputs for the

-18

-21

-A5

address lines on the microprocessor interface.

19

22

DS

Data Strobe (Input). This is the input for the active

high data strobe on the microprocessor interface.

20

23

R/W

Read or Write (Input). This is the input for the

read/write signal on the microprocessor interface

- high for read, low for write.

21

24

CS

Chip Select (Input). This is the input for the active low

chip select on the microprocessor interface

22

25

D7

Data 7 to 5 (Three-state I/O Pins). These are the

-24

-27

-D5

bidirectional data pins on the microprocessor interface.

25

29

D4

Data 4 to 0 (Three-state I/O Pins). These are the

-29

-33

-D0

bidirectional data pins on the microprocessor interface.

30

34

Power Input. Negative Supply (Ground).

31

35

STo7

ST-BUS Output 7 to 3 (Three-state Outputs). These

-35

-39

-ST03

are the pins for the eight 2048 kbit/s ST-BUS output

streams.

36

41

STo2

ST-BUS Output 2 to 0 (Three-state Outputs). These

-38

-43

- STo0

are the pins for the eight 2048 kbit/s ST-BUS output

streams.

39

44

ODE

Output Drive Enable (Input). If this input is held high,

the STo0-STo7 output drivers function normally. If this

input is low, the STo0-STo7 output drivers go into their

high impedance state. NB: Even when ODE is high,

channels on the STo0-STo7 outputs can go high

impedance under software control.

40

1

CSTo

Control ST-BUS Output (Complementary Output).

Each frame of 256 bits on this ST-BUS output contains

the values of bit 1 in the 256 locations of the

Connection Memory High.

6,

NC

No Connection.

18,

28,

40

Pin Description