SN54LVC00A, SN74LVC00A

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

SCAS279G – JANUARY 1993 – REVISED JUNE 1998

3

POST OFFICE BOX 655303

recommended operating conditions (see Note 4)

SN54LVC00A

SN74LVC00A

UNIT

MIN

MAX

MIN

MAX

UNIT

VCC

Supply voltage

Operating

2

3.6

1.65

3.6

V

VCC

Supply voltage

Data retention only

1.5

1.5

V

VCC = 1.65 V to 1.95 V

0.65

×VCC

VIH

High-level input voltage

VCC = 2.3 V to 2.7 V

1.7

V

VCC = 2.7 V to 3.6 V

2

2

VCC = 1.65 V to 1.95 V

0.35

×VCC

VIL

Low-level input voltage

VCC = 2.3 V to 2.7 V

0.7

V

VCC = 2.7 V to 3.6 V

0.8

0.8

VI

Input voltage

0

5.5

0

5.5

V

VO

Output voltage

0

VCC

0

VCC

V

VCC = 1.65 V

–4

IOH

High level output current

VCC = 2.3 V

–8

mA

IOH

High-level output current

VCC = 2.7 V

–12

–12

mA

VCC = 3 V

–24

–24

VCC = 1.65 V

4

IOL

Low level output current

VCC = 2.3 V

8

mA

IOL

Low-level output current

VCC = 2.7 V

12

12

mA

VCC = 3 V

24

24

TA

Operating free-air temperature

–55

125

–40

85

°C

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.