8-67

Data sheet acquired from Harris Semiconductor

SCHS261

Features

• Buffered Inputs

• Noninverting

• SCR Latchup Resistant BiCMOS Process and

Circuit Design

• Speed of Bipolar FAST™/AS/S

• 64mA Output Sink Current

• Controlled Output Edge Rates

• BiCMOS Technology with Low Quiescent Power

Description

The CD74FCT646 three-state octal bus transceiver/register

uses a small geometry BiCMOS technology. The output

stage is a combination of bipolar and CMOS transistors that

This resultant lowering of output swing (0V to 3.7V)

reduces power bus ringing (a source of EMI) and minimizes

simultaneous output switching. The output configuration

also enhances switching speed and is capable of sinking

64 milliamperes.

This device is a bus transceiver with D-Type flip-flops which

act as internal storage registers on the LOW to HIGH transi-

tion of either CAB or CBA clock inputs. Output Enable (OE)

and Direction (DIR) inputs control the transceiver functions.

Data present at the high impedance output can be stored in

either register or both but only one of the two buses can be

enabled as outputs at any one time. The Select controls

(SAB and SBA) can multiplex stored and transparent (real

time) data. The Direction control determines which data bus

will receive data when the Output Enable (OE) is LOW. In the

high impedance mode (Output Enable HIGH), A data can be

stored in one register and B data can be stored in the other

register. The clocks are not gated with the Direction (DIR)

and Output Enable (OE) terminals; data at the A or B termi-

nals can be clocked into the storage flip-flops at any time.

Pinout

Ordering Information

PART NUMBER

TEMP.

PACKAGE

PKG.

NO.

CD74FCT646EN

0 to 70

24 Ld PDIP

E24.3

CD74FCT646M

0 to 70

24 Ld SOIC

M24.3

CD74FCT646SM

0 to 70

24 Ld SSOP

M24.209

NOTE: When ordering the suffix M and SM packages, use the entire

part number. Add the suffix 96 to obtain the variant in the tape and reel.

CD74FCT646

(PDIP, SOIC, SSOP)

TOP VIEW

1

2

3

4

5

6

7

8

9

10

11

12

CAB

A0

A1

A2

A3

A4

A5

A6

A7

GND

16

17

18

19

20

21

22

23

24

15

14

13

B1

B3

B4

B6

B0

B5

B7

B2

SAB

DIR

CBA

SBA

OE

January 1997

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

FAST™ is a trademark of Fairchild Semiconductor.

Copyright

CD74FCT646

BiCMOS FCT Interface Logic,

Octal Bus Transceiver/Register, Three-State

NOT RECOMMENDED

FOR NEW

DESIGNS

Use CMOS

Technology

File Number

2393.2