CD54AC161, CD74AC161

4-BIT SYNCHRONOUS BINARY COUNTERS

SCHS239C – SEPTEMBER 1998 – REVISED MARCH 2003

2

POST OFFICE BOX 655303

FUNCTION TABLE

INPUTS

OUTPUTS

FUNCTION

CLR

CLK

ENP

ENT

LOAD

A,B,C,D

Qn

RCO

FUNCTION

L

X

X

X

X

X

L

L

Reset (clear)

H

↑

X

X

l

l

L

L

Parallel load

H

↑

XX

l

h

H

Note 1

Parallel load

H

↑

h

h

h

X

Count

Note 1

Count

H

X

l

X

h

X

qn

Note 1

Inhibit

H

X

X

l

h

X

qn

L

Inhibit

H = high level, L = low level, X = don’t care, h = high level one setup time prior to the CLK

low-to-high transition, l = low level one setup time prior to the CLK low-to-high transition, q = the

state of the referenced output prior to the CLK low-to-high transition, and

↑ = CLK low-to-high

transition.

NOTE 1: The RCO output is high when ENT is high and the counter is at terminal count

(HHHH).