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CD54HC4514 датащи(PDF) 5 Page - Texas Instruments

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номер детали CD54HC4514
подробное описание детали  HIGH-SPEED CMOS LOGIC 4-TO-16 LINE DECODER/DEMULTIPLEXER WITH INPUT LATCHES
PDF  14 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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CD54HC4514 датащи(HTML) 5 Page - Texas Instruments

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5
E to Outputs
tPHL, tPLH
CL = 50pF
2
-
-
175
-
220
-
265
ns
4.5
-
-
35
-
44
-
53
ns
CL = 15pF
5
-
14
-
-
-
-
-
ns
CL = 50pF
6
-
-
30
-
37
-
45
ns
Output Transition Time
tTHL, tTLH
CL = 50pF
2
-
-
75
-
95
-
110
ns
4.5
-
-
15
-
19
-
22
ns
6
-
-
13
-
16
-
19
ns
Input Capacitance
CIN
CL = 50pF
-
10
-
10
-
10
-
10
pF
Power Dissipation Capacitance
(Notes 3, 4)
CPD
-5
-
70
-
-
-
-
-
pF
NOTES:
3. CPD is used to determine the dynamic power consumption, per package.
4. PD = VCC
2 f
i (CPD + CL) where fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.
Switching Specifications CL = 50pF, Input tr, tf = 6ns (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC (V)
25oC
-40oC TO
85oC
-55oC TO
125oC
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
Test Circuits and Waveforms
NOTE: Outputs should be switching from 10% VCC to 90% VCC in
accordance with device truth table. For fMAX, input duty cycle = 50%.
FIGURE 1. HC CLOCK PULSE RISE AND FALL TIMES AND
PULSE WIDTH
FIGURE 2. HC TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
FIGURE 3. HC TRANSITION TIMES AND PROPAGATION DELAY TIMES, COMBINATION LOGIC
CLOCK
90%
50%
10%
GND
VCC
trCL
tfCL
50%
50%
tWL
tWH
10%
tWL + tWH =
fCL
I
tPHL
tPLH
tTHL
tTLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
VCC
tr = 6ns
tf = 6ns
90%
tPHL
tPLH
tTHL
tTLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
VCC
tr = 6ns
tf = 6ns
90%
CD54HC4514, CD74HC4514, CD74HC4515



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