LTC4009 datasheet(13/28 Pages) LINER

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4009fb

LTC4009

LTC4009-1/LTC4009-2

be used for a variety of purposes in applications. Table 1

summarizes the state of the three indicator outputs as a

function of LTC4009 operation.

Table 1. LTC4009 Open-Drain Indicator Outputs

ACP

CHRG

ICL

CHARGER STATE

Off

No DC Input (Shutdown)

Off

Shutdown, Reverse Current or

DCIN Overvoltage

Off

Bulk Charge

25μA

Off

Low Current Charge or Initial

CLP-BAT < 100mV

Input Current Limit During Bulk

Charge

25μA

Input Current Limit During Low

Current Charge

Off

Input Current Limit During DCIN

Overvoltage

PWM Controller

The LTC4009 uses a synchronous step-down architec-

ture to produce high operating efﬁciency. The nominal

operating frequency of 550kHz allows use of small ﬁlter

components. The following conceptual discussion of basic

PWM operation references Figure 1.

The voltage across the external charge current sense

resistor RSENSE is measured by current ampliﬁer CA. This

instantaneous current (VSENSE/RIN) is fed to the PROG pin

where it is averaged by an external capacitor and converted

to a voltage by the programming resistor RPROG between

PROG and GND. The PROG voltage becomes the average

charge current input signal to error ampliﬁer EA. EA also

OPERATION

receives loop control information from the battery voltage

feedback input VFB and the adapter input current limit

circuit. The ITH output of the error ampliﬁer is a scaled

control voltage for one input of the PWM comparator CC.

ITH sets a peak inductor current threshold, sensed by R1,

to maintain the desired average current through RSENSE.

The current comparator output does this by switching the

state of the RS latch at the appropriate time.

At the beginning of each oscillator cycle, the PWM clock

sets the RS latch and turns on the external topside NFET

(bottom-side synchronous NFET off) to refresh the current

carried by the external inductor L1. The inductor current

and voltage across RSENSE begin to rise linearly. CA buffers

this instantaneous voltage rise and applies it to CC with

gain supplied by R1. When the voltage across R1 exceeds

the peak level set by the ITH output of EA, the top FET

turns off and the bottom FET turns on. The inductor cur-

rent then ramps down linearly until the next rising PWM

clock edge. This closes the loop and sources the correct

inductor current to maintain the desired parameter (charge

current, battery voltage, or input current). To produce a

near constant frequency, the PWM oscillator implements

the equation:

CLP BAT

CLP

kHz

OFF =

–

• 550

Repetitive, closed-loop waveforms for stable PWM opera-

tion appear in Figure 2.

Figure 2. PWM Waveforms

OFF

INDUCTOR

CURRENT

TOP FET

BOTTOM FET

tOFF

THRESHOLD

SET BY ITH

VOLTAGE

4009 F02

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