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FD5T датащи(PDF) 8 Page - Pletronics, Inc. |
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FD5T датащи(HTML) 8 Page - Pletronics, Inc. |
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8 / 12 page ![]() FD5T Series Programmable CMOS Clock Oscillator November 2008 www.pletronics.com 425-776-1880 8 0 1 2 3 4 5 6 7 10 30 50 70 90 110 130 150 170 190 210 230 Fout (MHz) 0 5 10 15 20 25 30 10 30 50 70 90 110 130 150 170 190 210 230 PLL Frequency (MHz) 1 PLL On All PLLs Off 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 10 30 50 70 90 110 130 150 170 190 210 230 Fout (M Hz) 1 Output On All outputs Off 0 1 2 3 4 5 6 7 8 9 10 30 50 70 90 110 130 150 170 190 210 230 Fout (MHz) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 10 30 50 70 90 110 130 150 170 190 210 230 Fout (MHz) 1 Output On All outputs Off FD51xxT I DDOUT Current for Various Number of Outputs On No Load VDD=1.8V V DDOUT=3.3V V DDOUT=2.5V V DDOUT=1.8V FD51xxTL V DD = VDDOUT=1.8V FD5 Series I DD versus PLLs Used No Load V DD=1.8V Phase noise of the reference signal, Out3. 25MHz Reference Frequency RMS jitter is 1.4pS from 10Hz to 2MHz Example of the PLL synthesizing a frequency. 25MHz Reference Frequency Multiply by 8 to 200MHz Divide the 200MHz PLL output by 8 Phase noise plot of the resulting 25MHz on Out 3 |
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