LTC2924IGN datasheet(14/20 Pages) LINER

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LTC2924

2924fa

Note that the TMR pin may take a while to reach the VCC

voltage. The pin is pulled to VCC with the same 5µA current

source used for the TMR function. The larger the timer

capacitor, the longer this will take. To estimate the amount

of time required for the TMR pin to reach VCC in a fault

condition, multiply the normal timer duration by VCC (in

Volts). See Figures 7 and 8 for FAULT pin connections

when two or more LTC2924 chips are cascaded.

Sequence Errors

The LTC2924 keeps track of power supplies that should

be on during the Power On sequence and the Power Off

sequence. The LTC2924 also monitors each IN pin after all

ofthepowersupplieshavesequencedon.Ifapowersupply

(asmonitoredattheIN1-IN4pins)goeslowwhenitshould

be high, a fault condition is detected. All four OUT pins are

pulled low and the FAULT pin will be pulled low.

Theprecisionvoltagethresholdfordetectionofasequence

error at any of the IN1-IN4 pins is the same as the normal

threshold (~0.61V). The precision voltage comparators

used in the LTC2924 employ a sampled technique to im-

prove accuracy. The sample time is approximately 20µs.

To improve the speed of detection for a sequence error, a

second high speed comparator is used for detecting a low

power supply. The voltage threshold for the high speed

comparators is approximately 0.4V (VON(FAULT)). Voltages

sensed below this threshold when a power supply should

be ON will cause a fault in ~1µs.

System Controller ON Command Errors

Once the LTC2924 receives the Power On command via

the ON pin, the ON pin must remain above 0.61V until the

PowerOnsequencehascompleted(e.g.DONEisasserted).

RemovingtheONcommandbeforetheLTC2924PowerOn

sequence has completed is considered a fault condition.

All of the OUT1-OUT4 pins that are already high will be

pulled low and the FAULT pin will be pulled low.

The same is true for the Power Off sequence. If the

LTC2924 has completed the Power On sequence and the

ON pin goes low, the ON pin must remain below 0.61V

until the Power Off sequence has completed. Raising the

ON pin above 0.61V before the Power Off sequence has

completed is considered a fault condition. Any OUTn pins

that are still high will immediately be pulled low and the



FAULT pin will be pulled low.

Power On Timeout Errors

If the LTC2924 PGT is being used (not tied to ground) a

fault condition will be detected when the PGT pin goes

above ~1V. If this occurs during Power On, all of the

OUT1-OUT4 pins that are already high will be pulled low

and the FAULT pin will be pulled low.

Externally Commanded Faults

If an external circuit pulls the FAULT pin low, an external

fault condition is detected and all OUT pins will be pulled

low. After sensing the Externally Commanded Fault, the

LTC2924 will also pull down on the FAULT pin until the

conditions for clearing the fault condition exist (see Clear-

ing the Fault Condition).

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