LTC2485CDD datasheet(28/40 Pages) LINER

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LTC2485

2485fa

Due to the complex filtering and calibration algorithms

utilized, the converter input bandwidth is not modeled

very accurately by a first order filter with the pole located

at the 3dB frequency. When the internal oscillator is

used, the shape of the LTC2485 input bandwidth is

shown in Figure 29. When an external oscillator of fre-

quency fEOSC is used, the shape of the LTC2485 input

bandwidth can be derived from Figure 29, 60Hz mode

curve in which the horizontal axis is scaled by

fEOSC/307200.

The conversion noise (600nVRMS typical for VREF = 5V) can

be modeled by a white noise source connected to a noise

free converter. The noise spectral density is 47nV

√Hz for

an infinite bandwidth source and 64nV

√Hz for a single

0.5MHz pole source. From these numbers, it is clear that

particular attention must be given to the design of external

amplification circuits. Such circuits face the simultaneous

requirements of very low bandwidth (just a few Hz) in order

to reduce the output referred noise and relatively high

bandwidth (at least 500kHz) necessary to drive the input

switched-capacitor network. A possible solution is a high

gain, low bandwidth amplifier stage followed by a high

bandwidth unity-gain buffer.

When external amplifiers are driving the LTC2485, the

ADC input referred system noise calculation can be

simplified by Figure 30. The noise of an amplifier driving

the LTC2485 input pin can be modeled as a band limited

white noise source. Its bandwidth can be approximated

by the bandwidth of a single pole lowpass filter with a

corner frequency fi. The amplifier noise spectral density

is ni. From Figure 30, using fi as the x-axis selector, we

can find on the y-axis the noise equivalent bandwidth

freqi of the input driving amplifier. This bandwidth in-

cludes the band limiting effects of the ADC internal

calibration and filtering. The noise of the driving ampli-

fier referred to the converter input and including all these

effects can be calculated as N = ni • √freqi. The total

system noise (referred to the LTC2485 input) can now be

obtained by summing as square root of sum of squares

the three ADC input referred noise sources: the LTC2485

internal noise, the noise of the IN+ driving amplifier and

the noise of the IN– driving amplifier.

If the CA0/F0 pin is driven by an external oscillator of

frequency fEOSC, Figure 30 can still be used for noise

calculation if the x-axis is scaled by fEOSC/307200. For

large values of the ratio fEOSC/307200, the Figure 30 plot

accuracy begins to decrease, but at the same time the

LTC2485 noise floor rises and the noise contribution of the

driving amplifiers lose significance.

Normal Mode Rejection and Antialiasing

One of the advantages delta-sigma ADCs offer over con-

ventional ADCs is on-chip digital filtering. Combined with

a large oversampling ratio, the LTC2485 significantly

simplifies antialiasing filter requirements. Additionally,

the input current cancellation feature of the LTC2485

allows external lowpass filtering without degrading the DC

performance of the device.

The SINC4 digital filter provides greater than 120dB nor-

mal mode rejection at all frequencies except DC and

integer multiples of the modulator sampling frequency

(fS). The LTC2485’s autocalibration circuits further sim-

plify the antialiasing requirements by additional normal

mode signal filtering both in the analog and digital domain.

Independent of the operating mode, fS = 256 • fN = 2048

• fOUTMAX where fN is the notch frequency and fOUTMAX is

the maximum output data rate. In the internal oscillator

mode with a 50Hz notch setting, fS = 12800Hz, with

50Hz/60Hz rejection, fS = 13960Hz and with a 60Hz notch

setting fS = 15360Hz. In the external oscillator mode, fS =

fEOSC/20. The performance of the normal mode rejection

is shown in Figures 31 and 32.

In 1x speed mode, the regions of low rejection occurring

at integer multiples of fS have a very narrow bandwidth.

Magnified details of the normal mode rejection curves are

shown in Figure 33 (rejection near DC) and Figure 34

(rejection at fS = 256fN) where fN represents the notch

frequency. These curves have been derived for the exter-

nal oscillator mode but they can be used in all operating

modes by appropriately selecting the fN value.

APPLICATIO S I FOR ATIO

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