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LTM4616 датащи(PDF) 6 Page - Linear Technology

номер детали LTM4616
подробное описание детали  Dual 8A per Channel Low VIN DC/DC 關Module
PDF  24 Pages
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производитель  LINER [Linear Technology]
домашняя страница  http://www.linear.com
Logo LINER - Linear Technology

LTM4616 датащи(HTML) 6 Page - Linear Technology

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LTM4616
6
4616fa
GND1 and GND2 (BANK2 and BANK5); (A1-A5, A12, B1-
B5, B7-B12, C3-C12, D3-D7) and (G1-G5, G12, H1-H5,
H7-H12, J3-J12, K3-K7): Power Ground Pins for Both
Input and Output Returns.
SVIN1and SVIN2 (E5 and L5): Signal Input Voltage for Each
Channel. This pin is internally connected to VIN through
a lowpass filter.
SGND1 and SGND2 (F5 and M5): Signal Ground Pin for
Each Channel. Return ground path for all analog and low
power circuitry. Tie a single connection to the output
capacitor GND in the application. See layout guidelines
in Figure 17.
TEMPERATURE (°C)
–50
592
594
596
25
75
100
4616 G14
590
–25
0
50
598
600
602
125
VIN = 5.5V
VIN = 3.3V
VIN = 2.7V
Start-Up
VFB vs Temperature
Load Regulation vs Current
2.5V Output Current
Short-Circuit Protection
(2.5V Short, No Load)
VOUT
0.5V/DIV
VIN
2V/DIV
50μs/DIV
VIN = 5V
VOUT = 1.5V
COUT = 100μF NO LOAD AND 8A LOAD
(DEFAULT 100μs SOFT-START)
4616 G13
LOAD CURRENT (A)
0
–0.6
–0.5
–0.2
–0.3
–0.1
0
24
–0.4
68
4616 G15
FC MODE
VIN = 3.3V
VOUT = 1.5V
Short-Circuit Protection
(2.5V Short, 4A Load)
OUTPUT CURRENT (A)
0
0
0.5
1.0
1.5
2.0
2.5
3.0
510
15
20
4616 G16
2V/DIV
2V/DIV
5A/DIV
50μs/DIV
4616 G17
VOUT
VIN
IOUT
VIN = 5V
VOUT = 2.5V
5V/DIV
5V/DIV
5A/DIV
5A/DIV
50μs/DIV
4616 G18
VOUT
VIN
IOUT SHORT
IOUT LOAD
VIN = 5V
VOUT = 2.5V
VIN1, VIN2, (BANK1 and BANK2); (F1-F4, E1-E4, C1-C2,
D1-D2) and (J1-J2, K1-K2, L1-L4, M1-M4): Power Input
Pins. Apply input voltage between these pins and GND
pins. Recommend placing input decoupling capacitance
directly between VIN pins and GND pins.
VOUT1, VOUT2 (BANK3 and BANK6); (D9-D12, E9-E12,
F9-F12) and (K9-K12, L9-L12, M9-M12): Power Output
Pins. Apply output load between these pins and GND
pins. Recommend placing output decoupling capacitance
directly between these pins and GND pins. See Table 1.
TYPICAL PERFORMANCE CHARACTERISTICS Specified as Each Channel
PIN FUNCTIONS



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