10

LTC6907

6907fa

APPLICATIO S I FOR ATIO

Alternative Methods for Setting the Output Frequency

Any means of sinking current from the SET pin will control

the output frequency of the LTC6907. Equation 2 (re-

peated below) gives the fundamental relationship between

frequency and the SET pin voltage and current:

t

V

I

pF

OSC

OSC

SET

SET

==

1

5

ƒ

•

(2)

This equation shows that the LTC6907 converts conduc-

it is given approximately by:

V

V

Log

I

I

mV Log

I

A

mV C

SET

T

e

SET

S

e

SET

≅

≅

⎛

⎝⎜

⎞

⎠⎟

°

•

.•

•

–.

/

–

25 9

82 10

23

18

where

If the SET pin is driven with a current source generating

SET

e

SET

I

pF

mV

I

A

Log

≅

⎛

⎝⎜

⎞

⎠⎟

5

25 9

82 10

18

.•

•

–

–

2

23

./

mV C

°

Figure 12 and Figure 13 show a current controlled oscilla-

tor and a voltage controlled oscillator. These circuits are

not highly accurate if used alone, but can be very useful if

they are enclosed in an overall feedback circuit such as a

phase-locked loop.

0

µA

TO 11.25

µA

49.9k

6907 F12

4MHz TO 400kHz

10k

GND

DIV

OUT

GRD

SET

LTC6907

Figure 12. Current Controlled Oscillator

GND

DIV

OUT

GRD

SET

LTC6907

56.2k

499k

4MHz TO 400kHz

6907 F13

Figure 13. Voltage Controlled Oscillator

Jitter and Divide Ratio

At a given output frequency, a higher master oscillator

frequency and a higher divide ratio will result in lower jitter

and higher power supply dissipation. Indeterminate jitter

percentage will decrease by a factor of slightly less than

the square root of the divider ratio, while determinate jitter

will not be similarly attenuated. Please consult the speci-

fication tables for typical jitter at various divider ratios.