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LTC1594CS датащи(PDF) 12 Page - Linear Technology |
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LTC1594CS датащи(HTML) 12 Page - Linear Technology |
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12 / 24 page ![]() 12 LTC1594/LTC1598 15948fb after a delay of tOFF, all the channels are switched off to ensure a break-before-make interval. After this interval, the selected channel is switched on allowing signal transmission. The selected channel remains on until the next falling edge of CS and the process repeats itself with the “EN” bit being logic high. If the “EN” bit is logic low, all the channels are switched off simultaneously after a delay of tOFF from CS being pulled low and all the channels remain off until the next falling edge of CS. Input Data Word When CS is high, the LTC1594/LTC1598 clock data into the DIN inputs on the rising edge of the clock and store the data into a 4-bit register. The input data words are defined as follows: D0 EN D2 D1 CHANNEL SELECTION 1594/98 AI02 “EN” Bit The first bit in the 4-bit register is an “EN” bit. If the “EN” bit is a logic high, as illustrated in Figure 1, it enables the selected channel after a delay of tON when the CS is pulled low. If the “EN” bit is logic low, as illustrated in Figure 2, it disables all channels after a delay of tOFF when the CS is pulled low. Multiplexer (MUX) Address The 3 bits of input word following the “EN” bit select the channel in the MUX for the requested conversion. For a given channel selection, the converter will measure the voltage of the selected channel with respect to the voltage on the COM pin. Tables 1 and 2 show the various bit combinations for the LTC1594/LTC1598 channel selection. Table 1. Logic Table for the LTC1594 Channel Selection CHANNEL STATUS EN D2 D1 DO All Off 0 X X X CH0 1 0 0 0 CH1 1 0 0 1 CH2 1 0 1 0 CH3 1 0 1 1 APPLICATIONS INFORMATION Table 2. Logic Table for the LTC1598 Channel Selection CHANNEL STATUS EN D2 D1 DO All Off 0 X X X CH0 1 0 0 0 CH1 1 0 0 1 CH2 1 0 1 0 CH3 1 0 1 1 CH4 1 1 0 0 CH5 1 1 0 1 CH6 1 1 1 0 CH7 1 1 1 1 Transfer Curve The LTC1594/LTC1598 are permanently configured for unipolar only. The input span and code assignment for this conversion type is illustrated below. Transfer Curve VREF 4096 VIN 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 • • • 1594/98 • AI03 1LSB = Output Code OUTPUT CODE • • • 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INPUT VOLTAGE VREF – 1LSB VREF – 2LSB • • • 1LSB 0V INPUT VOLTAGE (VREF = 5.000V) 4.99878V 4.99756V • • • 0.00122V 0V 1594/98 • AI04 |
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