CMP0817BA0-I

CMOS LPRAM

Revision 0.3

Sep. 2006

2

512K x 16 bit Super Low Power and Low Voltage Full CMOS RAM

PIN DESCRIPTION

1

2

3

4

5

6

A

B

C

D

E

F

G

H

/LB

/OE

A0

A1

A2

I/O9

/UB

A3

A4

/CS

I/O10

I/O11

A5

A6

I/O2

VSS

I/O12

A17

A7

I/O4

VCCQ

I/O13

DNU

A16

I/O5

I/O15

I/O14

A14

A15

I/O6

I/O16

NC

A12

A13

/WE

A18A8

A9A10

A11

CS2

I/O1

I/O3

VCC

VSS

I/O7

I/O8

NC

48-FBGA : Top View(Ball Down)

Do Not Use

DNU

Data Inputs/Outputs

I/O1~I/O16

Core Power

VCC

Chip Select Input

CS2

No Connection

NC

Lower Byte(I/O 1~8)

/LB

Address Inputs

A0~A18

Upper Byte(I/O9~16)

/UB

Write Enable Input

/WE

Ground

VSS

Output Enable Input

/OE

I/O Power

VCCQ

Chip Select Input

/CS1

Function

Name

Function

Name

FEATURES

• Organization : 512K x 16

• Power Supply Voltage : 2.7~3.3V

• Three state output and TTL Compatible

• Separated I/O power(VCCQ) & Core Power(VCC)

• Easy memory expansion with /CS1, CS2, and /OE features

• Automatic power-down when deselected

PRODUCT FAMILY

ISB1

(CMOS Standby

Current)

ICC2

ICC1

Max.

Typ.

20mA

Max.

Typ.

Max.

Typ.

Min.

70uA

3.0

Typ.

Max.

30uA

12mA

3mA

1.5mA

70ns

3.3

2.7

Industrial

(-40~85’C)

Operating

Voltage (V)

f = fmax

f = 1MHz

Power Dissipation

Speed

Operating

Temperature

Product Family

FUNCTIONAL BLOCK DIAGRAM

Precharge circuit.

Clk gen.

VCC

VSS

Memory array

Row

Addresses

I/O Circuit

Column select

Data

cont

Data

cont

Column Addresses

Data

cont

Control Logic

/CS1

CS2

/OE

/WE

/UB

/LB

I/O9~I/O16

I/O1~I/O8

Row

select

1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at Vcc = Vcc (typ) and T