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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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9202 датащи(PDF) 50 Page - STMicroelectronics |
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9202 датащи(HTML) 50 Page - STMicroelectronics |
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50 / 175 page  UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV 50/175 OSCILLATOR The oscillator circuit of the uPSD325X devices is a single stage inverting amplifier in a Pierce oscilla- tor configuration. The circuitry between XTAL1 and XTAL2 is basically an inverter biased to the transfer point. Either a crystal or ceramic resonator can be used as the feedback element to complete the oscillator circuit. Both are operated in parallel resonance. XTAL1 is the high gain amplifier input, and XTAL2 is the output. To drive the uPSD325X devices ex- ternally, XTAL1 is driven from an external source and XTAL2 left open-circuit. Figure 19. Oscillator SUPERVISORY There are four ways to invoke a reset and initialize the uPSD325X devices. s Via the external RESET pin s Via the internal LVR Block. s Via USB bus reset signaling. s Via Watch Dog timer The RESET mechanism is illustrated in Figure 20. Figure 20. RESET Configuration AI06620 XTAL1 XTAL2 8 to 40 MHz XTAL1 XTAL2 External Clock AI06621 Reset CPU & PERI. Noise Cancel LVR S Q R CPU Clock Sync 10ms Timer USB Reset RSTE WDT PSD_RST “Active Low 10ms at 40Mhz 50ms at 8Mhz |
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