EVM7725AXF datasheet(9/39 Pages) SEMTECH

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TEST AND MEASUREMENT PRODUCTS

Edge7725

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The QA, QA*, QB, QB* output voltages are relative to the

PECL supply voltage input. The DC Specifications section

will specify the differential output voltage swings and com-

mon mode voltages to expect.

Differential Amplifier and Comparator

VINP[0], VINP[1] are also input to a differential amplifier.

The differential amplifier output (VINP[0] minus VINP[1])

is then compared against CVC[0] and CVC[1] inputs over a

±800mV range, where

0.1V < |VINP[0] – VINP[1]| < 0.8V

The figure below is a functional diagram of the window and

differential comparators.

The difference amplifiers will subtract the voltage at VINP[1]

from VINP[0] and the result is presented to a comparator

that compares this result against an input voltage CVC[0]

or CVC[1]. These input voltages may well be referenced to

a different ground than analog ground at the E7725. They

more than likely will be referenced to a buffered version of

the DUT ground. In order for the difference amplifiers to

operate correctly each of the them has a ground reference

input, CVC_GND[0:1]. This high impedance input should

be connected to the ground reference point of the level

DAC that is generating the CVC[0] and the CVC[1] voltages

respectively. The voltages at CVC_GND[0:1] can be

+/-0.25V from analog ground at the E7725.

Circuit Description (continued)

Window Comparator

Two comparators are connected on-chip to form a window

comparator to determine whether the DUT is high, low, or

in an intermediate state. VINP is tied to the positive inputs

of both comparators. The selection of either comparator A

or B for the DUT high or the DUT low comparison is arbi-

trary.

The figure below shows the correct polarity for the com-

parator connections.

Comparator truth table, where CVA > CVB:

Thresholds

CVA and CVB are the window comparator’s two threshold

levels. These inputs are high impedance voltage controlled

inputs that determine at which VINP voltage the compara-

tors will change output states.

CVC[0], CVC[1] are the two differential comparator’s thresh-

old levels. The window and differential comparators can-

not be used at the same time because they share output

pins QA, QA*, QB, QB*. Since they are not used at the

same time, the compare voltages can be shared between

the window and differential comparators to save in refer-

ence level DACs and power. CVC[0] may be connected to

CVA[0] or CVB[0], and the same is true for CVC[1], CVA[1]

and CVB[1].

CVA

VCH

VCL

VINP

CVB

QA*

CBIAS

QB*

VCC

VEE

Clamp Enable

(Internal Signal)

CH[0]

Window

Comparator

CH[1]

Window

Comparator

QA[0]

QA*[0]

QB[0]

QB*[0]

VINP[0]

CVC[0]

CVB[0]

CVA[0]

SEL_CMP

CVC_GND[0]

QA[1]

QA*[1]

QB[1]

QB*[1]

VINP[1]

CVC[1]

CVB[1]

CVA[1]

CVC_GND[1]

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