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CS4350 датащи(PDF) 32 Page - Cirrus Logic

номер детали CS4350
подробное описание детали  192 kHz Stereo DAC with Integrated PLL
PDF  41 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4350 датащи(HTML) 32 Page - Cirrus Logic

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32
DS691F1
CS4350
8.4
Mute Control - Register 04h
8.4.1
Auto-Mute (AMUTE) Bit 7
Function:
When set to 1 (default), the Digital-to-Analog converter output will mute following the reception of 8192
consecutive audio samples of static 0 or -1. A single sample of non-static data will release the mute. De-
tection and muting is done independently for each channel. The quiescent voltage on the output will be
retained and the Mute Control pin will go active during the mute period.
When set to 0, this function is disabled
8.4.2
AMUTEC = BMUTEC (MUTEC A=B) Bit 5
Function:
When set to 0 (default), the AMUTEC and BMUTEC pins operate independently.
When set to 1, the individual controls for AMUTEC and BMUTEC are internally connected through an
AND gate prior to the output pins. Therefore, the external AMUTEC and BMUTEC pins go active only
when the requirements for both AMUTEC and BMUTEC are valid.
8.4.3
Channel A Mute (MUTE_A) Bit 4 & Channel B Mute (MUTE_B) Bit 3
Function:
When set to 1, the Digital-to-Analog converter output will mute. The quiescent voltage on the output will
be retained. The muting function is effected, similar to attenuation changes, by the Soft and Zero Cross
bits in the Volume and Mixing Control register. The corresponding MUTEC pin will go active following any
ramping due to the soft and zero cross function.
When set to 0 (default), this function is disabled.
10
00
aL
MUTE
10
01
aL
bR
10
10
aL
bL
10
11
aL
b[(L+R)/2]
11
00
a[(L+R)/2]
MUTE
11
01
a[(L+R)/2]
bR
11
10
a[(L+R)/2]
bL
11
11
a[(L+R)/2]
b[(L+R)/2]
76
543
21
0
AMUTE
Reserved
MUTEC A=B
MUTE_A
MUTE_B
Reserved
Reserved
Reserved
10
000
00
0
ATAPI_A1 ATAPI_A0 ATAPI_B1 ATAPI_B0
AOUTA
AOUTB
Table 4. ATAPI Decode



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