AT91SAM7S64 datasheet(39/50 Pages) ATMEL

39 / 50 page

6175GS–ATARM–24-Dec-08

AT91SAM7S Series Summary

• ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards

– NACK handling, error counter with repetition and iteration limit

• IrDA modulation and demodulation

– Communication at up to 115.2 Kbps

• Test Modes

– Remote Loopback, Local Loopback, Automatic Echo

10.8

Serial Synchronous Controller

• Provides serial synchronous communication links used in audio and telecom applications

• Contains an independent receiver and transmitter and a common clock divider

• Offers a configurable frame sync and data length

• Receiver and transmitter can be programmed to start automatically or on detection of

different event on the frame sync signal

• Receiver and transmitter include a data signal, a clock signal and a frame synchronization

signal

10.9

Timer Counter

• Three 16-bit Timer Counter Channels

– Two output compare or one input capture per channel (except for AT91SAM7S32/16

which have only two channels connected to the PIO)

• Wide range of functions including:

– Frequency measurement

– Event counting

– Interval measurement

– Pulse generation

– Delay timing

– Pulse Width Modulation

– Up/down capabilities

• Each channel is user-configurable and contains:

– Three external clock inputs (The AT91SAM7S32/16 have one)

– Five internal clock inputs, as defined in Table 10-5

– Two multi-purpose input/output signals

– Two global registers that act on all three TC channels

Table 10-5.

Timer Counter Clocks Assignment

TC Clock Input

Clock

TIMER_CLOCK1

MCK/2

TIMER_CLOCK2

MCK/8

TIMER_CLOCK3

MCK/32

TIMER_CLOCK4

MCK/128

TIMER_CLOCK5

MCK/1024

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