25

4317IS–AVR–01/08

AT90PWM2/3/2B/3B

The comparator output toggles at the comparator clock frequency when the voltage differ-

ence between both inputs is lower than the offset. This may occur when comparing signal

with small slew rate.

Work around:

This effect normally do not impact the PSC, as the transition is sampled once per PSC cycle

Be carefull when using the comparator as an interrupt source.

15. PSC : Autolock mode

This mode is not properly handled when CLKPSC is different from CLK IO.

Work around:

With CLKPSC equals 64/32 MHz (CLKPLL), use LOCK mode

16. DALI : 17th bit detection

17th bit detection do not occurs if the signal arrives after the sampling point.

Workaround:

Use this feature only for sofware development and not in field conditions

17. PSC : One ramp mode with PSC input mode 8

The retriggering is not properly handled in this case.

Work around:

Do not program this case.

18. PSC : Desactivation of outputs in mode 14

See “PSC Input Mode 14: Fixed Frequency Edge Retrigger PSC and Disactivate Output” on

page 155.

Work around:

Do not use this mode to desactivate output if retrigger event do not occurs during On-Time.

9.2

AT90PWM2B/3B

•

PSC : Double End-Of-Cycle Interrupt Request in Centered Mode

•

ADC : Conversion accuracy

1.

PSC : Double End-Of-Cycle Interrupt Request in Centered Mode

In centered mode, after the “expected” End-Of-Cycle Interrupt, a second unexpected Inter-

rupt occurs 1 PSC cycle after the previous interrupt.

Work around:

While CPU cycle is lower than PSC clock, the CPU sees only one interrupt request. For PSC

clock period greater than CPU cycle, the second interrupt request must be cleared by

software.

2.

ADC : Conversion accuracy

The conversion accuracy degrades when the ADC clock is 2 MHz.

Work around:

When a 10 bit conversion accuracy is required, use an ADC clock of 1 MHz or below.

At 2 Mhz the ADC can be used as a 7 bits ADC.

3.

DAC Driver linearity above 3.6V

With 5V Vcc, the DAC driver linearity is poor when DAC output level is above Vcc-1V. At 5V,

DAC output for 1023 will be around 5V - 40mV.

Work around: .