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PTH04T240FAS датащи(PDF) 2 Page - Texas Instruments |
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PTH04T240FAS датащи(HTML) 2 Page - Texas Instruments |
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2 / 34 page ![]() PTH04T240F 2 V I 5 9 + C I 220 mF (Required) 8 R SET[A] 1% 0.05 W (Required) V I Track GND V OAdj V O TT 4 3 GND GND R TT 1% 0.05W (Required) TurboTrans™ +Sense 6 L O A D -Sense GND + 11 R UVLO 1% 0.05 W (Optional) Inhibit INH/UVLO Track 10 7 -Sense +Sense V O C O 1000 mF (Required) SYNC 1 SmartSync C I2 22 mF (Optional) UDG-08158 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PTH04T240F A. `RSET required to set the output voltage to a value higher than 0.69 V. See Electrical Characteristics table. 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F |
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