ADATE305

Rev. 0 | Page 51 of 56

2.5 + DUTGND

10kΩ

225kΩ

2µA

20µA

200µA

2mA

22.5kΩ

2.25kΩ

250Ω

CRA = 220pF

FFCAP_xA

FFCAP_xB

MV

15.5Ω

DUTx

REF

IN-AMP G = 5

MEASOUT01 SELECT DATA[2:1]

(ADDR[4:0] = 0x0F)

PMU FORCE V/I DATA[3]

(ADDR[4:0] = 0x0E)

PMU INPUT SELECTION DATA[9:8]

(ADDR[4:0] = 0x0E)

PMU CLAMP ENABLE DATA[5]

(ADDR[4:0] = 0x0E)

PMU SENSE PATH DATA[7]

(ADDR[4:0] = 0x0E)

EXTERNAL DUT

SENSE PIN

PMU MEASURE V/I DATA[4]

(ADDR[4:0] = 0x0E)

CH[1] PMU V/I

MUX

MUX

MUX

MUX

MUX

VCH

VCL

MEASURE V

(AT OUTPUT OF

SENSE MUX)

NOTES

1. SWITCHES CONNECTED WITH DOTTED LINES REPRESENT PMU RANGE DATA[2:0] (ADDR[4:0] = 0x0E); WHEN PMU ENABLE D ATA[2] = 0 (ADDR[4:0] = 0x0C), ALL

SWITCHES OPEN AND PMU POWERS DOWN.

2. THE EXTERNAL SENSE PATH MUST CLOSE THE LOOP TO ENABLE THE CLAMPS TO OPERATE CORRECTLY.

3. 32mA RANGE HAS ITS OWN OUTPUT BUFFER.

4. 32mA BUFFER TRISTATES WHEN NOT IN USE.

330pF

SCAPx

(EXTERNAL)

32mA

32mA BUFFER

TEMP SENSE

GND REF

MEASURE V

MEASURE I

TEMP SENSE

VIN

2.5V + DUTGND

DUTGND

MEASURE

OUT

MEASOUT01 OUTPUT

ENABLE DATA[0]

(ADDR[4:0] = 0x0F)

ONE PER DEVICE

Figure 83. PMU Block Diagram