AD9239 datasheet(33/40 Pages) AD

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AD9239

Rev. 0 | Page 33 of

MEMORY MAP

READING THE MEMORY MAP TABLE

Each row in the memory map register table (Table 14) has eight

bit locations. The memory map is divided into three sections: the

chip configuration registers (Address 0x00 to Address 0x02), the

device index and transfer registers (Address 0x05 and

Address 0xFF), and the ADC functions registers (Address 0x08 to

Address 0x53).

The leftmost column of the memory map indicates the register

address number, and the default value is shown in the second

rightmost column. The Bit 7 column is the start of the default

hexadecimal value given. For example, Address 0x09, the clock

= 0, Bit 5 = 0, Bit 4 = 0, Bit 3 = 0, Bit 2 = 0, Bit 1 = 0, and

Bit 0 = 1, or 0000 0001 in binary. This setting is the default for

the duty cycle stabilizer in the on condition. By writing a 0 to Bit 0

of this address, followed by a 0x01 in Register 0xFF (transfer bit),

the duty cycle stabilizer turns off. It is important to follow each

writing sequence with a transfer bit to update the SPI registers. For

more information on this and other functions, consult the AN-877

Application Note, Interfacing to High Speed ADCs via SPI.

RESERVED LOCATIONS

Undefined memory locations should not be written to except

when writing the default values suggested in this data sheet.

Addresses that have values marked as 0 should be considered

reserved and have a 0 written into their registers during power-up.

DEFAULT VALUES

When the AD9239 comes out of a reset, critical registers are

preloaded with default values. These values are indicated in

Table 14, where an X refers to an undefined feature.

LOGIC LEVELS

An explanation of various registers follows: “bit is set” is

synonymous with “bit is set to Logic 1” or “writing Logic 1 for

the bit.” Similarly, “clear a bit” is synonymous with “bit is set to

Logic 0” or “writing Logic 0 for the bit.”

AD9239 датащи(PDF) 33 Page - Analog Devices