In order to saturate the power switch and reduce

conduction losses, adequate direct base current

= 100

off the power transistor (retrace phase). Most of

the

dissipation, especially in

the

deflection

application, occurs at switch-off so it is essential

new set of curves have been defined to give total

32 KHz and 64 KHz scanning frequencies in

order to choice the optimum negative drive. The

test circuit is illustrated in fig. 1.

the excess carriers in the collector when base

current is still present, thus avoiding any tailing

phenomenon in the collector current.

The values of L and C are calculated from the

following equations:

1

2

L

1

2

C

ω= 2 πf =

1

√

flyback voltage, f= frequency of oscillation during

retrace.

BASE DRIVE INFORMATION

Figure 1: Inductive Load Switching Test Circuit.

Figure 2: Switching Waveforms in a Deflection Circuit.

THD200FI

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