M62055FP

Rev.2.00 Mar 10, 2006 page 2 of 9

Block Diagram

Vref

≈0.9V

Vref

≈1.5V

S

Q

RQ

S

Q

RQ

R

Q

SQ

R

Q

SQ

S

Q

RQ

Set

priority

Reset

priority

Reset

priority

Reset

priority

Set

priority

Vref

=1.25V

8

V

CC

6

5

4

RESET

3

TC

2

WD

Note:

1

GND

7

CLM

V

CC

V

CC

V

CC

–

+

–

+

–

+

–

+

–

+

–

+

–

+

40k

56k

Vref

≈1.5V

Vref

≈1.25V

The input and output

reversal conservation

circuit

Start circuit

Voltage detector

(Current limiter)

Rise delay

(300

µs)

Pin Functional Description

Pin No.

Symbol

Functional Description

1

GND

Ground

2

WD

Input for watchdog timer

3

TC

Setting up reset timer and watchdog timer

4

RESET

Reset signal output

5

Feedback to a power supply for a MCU

6

Controlling the stability of an output voltage with a PNP transistor connected

externally

7

CLM

Current limiting

8

Power supply voltage