TDA9106 datasheet(18/30 Pages) STMICROELECTRONICS

18 / 30 page

I.6 - Sync Identification Status

TDA9106 is able to feed back to the MCU (thanks

to I

2C) the Sync input status (sync identification) so

that the MCU can chooseSync priority throughI

2C.

As extracted Vertical sync pulse is performed when

choice already occured and when 12V is supplied,

we recommend to use the deviceas following :(that

means that even in Power management mode the

IC is able to inform MCU on detected synchro

signals due to its 5V supply).

First, refresh Synchrodetection by I

2C. Then check

the status of H/V det and Vdet by I

2C read.

Sync priority choice should be :

Table 1 : Sync Priority Choice

H/V det

V det

Sync priority

Subaddress 03

Comment

Synchro type

Yes

Separated H & V

Yes

Composite TTL

H&V

Sync on Green

Of course, when choice is done, one can refresh

the synchro detections and verify that extracted

Vsync is present and that no synchro type change

occured.

Synchro processor is also giving synchro polarity

information.

I.7 - IC status

The IC can inform the MCUeither the 1st Horizontal

PLLor Vertical section are locked or not, and if Xray

has been activated.

This last status permits to the MCU :

- reset the Xray internal latch decreasing the VCC

supply

- directly reset throw the I

2C interface.

OPERATING DESCRIPTION (continued)

I.8 - Synchro Inputs

Both H/HVin and Vsyncin inputs are TTL compat-

ible trigger with Hysterisis to avoid erratic detection.

It includes pull up resistor to VDD.

Vertical sync extractor is included for composite

sync or composite video.Applicationengineer must

adapt resistor R and capacitor C dedicated to its

application.

S/G

Ω

REF (Typ.)

=10

µA

1.6V

TDA9106

Figure 5

Resistor R is fixed by detection threshold wanted :

R< (VTHRESHOLD /IREF)

Then C is determined by maximum pulse width to

detect (in general, vertical sync width) :

RC > (max pulse width)

I.9 - Synchro Processor Outputs

Synchro processor delivers on 3 TTL-compatible

CMOS outputs the following signals :

- Hout as follow :

Sync Mode

Hout Mode

Hout Polarity

Separated

Horizontal

Same as Input

TTL Composite

Same as Input

S/G

Composite

Negative

- Vsyncout is either vertical extracted pulse output

or Vsyncin input. It keeps the input polarity.

- Hlockoutis the Horizontal1st PLLstatus: 0V when

locked. It permits MCU to adjust free running

frequency and optimizes the IC performance.

TDA9106

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