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their currents to a DC voltage.

To minimize the noise induced by the digital part of the system, a special guard area is implemented.

The loop gain can be set for different conditions by setting the current values of the chargepump generator.

Frequency Generation for Phase Comparison

The RF signals applies a two modulus counter (32/33) pre-scaler, which is controlled by a 5-bit divider(A). The

5-bit register (PC0 to PC4) controls this divider. In parallel the output of the prescaler connects to an 11-bit di-

vider(B). The 11-bit PC register (PC5 to PC15) controls this divider

Dividing range:

Important: For correct operation: A

Three State Phase Comparator

This phase error signal drives the charge pump current generator.

Charge Pump Current Generator

This system generators signed pulses of current. The phase error signal decides the duration and polarity of

those pulses. The current absolute values are programmable by A register for high current and B register for

low current.

Inlock Detector

Switching the chargepump in low current mode can be done either via software or automatically by the inlock

detector, by setting bit LDENA to "1".

mode.

Few programmable phase errors (D0, D1) are available for inlock detection

The count of detected inlock informations, to release the inlock signal is adjustable (D2, D3), to avoid a switching

to low current during a frequency jump.

Low Noise CMOS Op-amp

An internal voltage divider at pin VREF2 connects the positive input of the low noise op-amp. The charge pump

output connects the negative input. This internal amplifier in cooperation with external components can provide

an active filter. The negative input is switchable to three input pins, to increase the flexibility in application. This

feature allows two separate active filters for different applications.

A logical "0" in the LPF register activates PIN LPFM, otherwise PIN LPAM is active. While the high current mode

is activated LPHC is switched on.

IF Counter Block

The input signal for FM and AM upconversion is the same 10.7MHz IF level after limiter. The grade of integration

is adjustable by eight different measuring cycle times. The tolerance of the accepted count value is adjustable,

to reach an optimum compromise for search speed and precision of the evaluation.

For the FM range the center frequency of the measured count value is adjustable in 32 steps, to get the possi-

bility of fitting the IF-filter tolerance. In the AM upconversion range an IF frequency of 10.689MHz to 10.720MHz

with 1kHz steps is available.