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TDA7427 датащи(PDF) 12 Page - STMicroelectronics |
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TDA7427 датащи(HTML) 12 Page - STMicroelectronics |
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12 / 21 page ![]() dress being transmitted. After this comparison, the TDA7427 will generate an ”acknowledge” on the SDA line and will per- form either a read or write operation according to the state of R/W bit. Write Operation Following a START condition the master sends a slave address word with the R/W bit set to ”0”. The TDA7427 will ”acknowledge” after this first transmission and wait for a second word (the word address field). This 8 bit address field provides an access to any of the 8 internal addresses. Upon receipt of the word address the TDA7427 slave device will re- spond with an ”acknowledge”. At this time, all the following words transmitted to the TDA7427 will be considered as Data. The internal address will be automatically incremented. After each word re- ceipt the TDA7427 will answer with an ”acknow- ledge”. SOFTWARE SPECIFICATION I 2C Protocol The interface protocol comprises: A start condition (s) A chip address byte (the LSB determines read/write transmission) A sub-address byte. A sequence of data (N-bytes + acknowledge) A stop condition (P) CHIP ADDRESS MSB LSB 110 00 100 SUBADDRESS MSB LSB FUNCTION T3 T2 T1 I A3 A2 A1 A0 0000 Charge pump control 0001 PLL counter 1 (LSB) 0010 PLL counter 2 (MSB) 0011 PLL reference counter 1 (LSB) 0100 PLL reference counter 2 (MSB) 0101 PLL lockdetector control and PLL mode select 0110 IFC reference counter 1 (LSB) 0111 IFC reference counter 2 (MSB) and IFC mode select 1000 IF counter control 1 1001 IF counter control 2 1010 Oscillator adjust 1011 Port extension 0 page mode off 1 page mode enabled T1, T2, T3 used for testing, in application mode they have to be ”0” CHIP ADDRESS SUBADDRESS DATA 1 to DATA n MSB LSB MSB LSB MSB LSB S 1100010 R/W ACK T T T I A3 A2 A1 A0 ACK DATA ACK P ACK = Acknowledge S = Start P = Stop I = Auto Increment T = used for testing (in application mode they have to be ” 0”) MAX CLOCK SPEED 400kbits/s TDA7427 12/21 |
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